LT1313
PIN FUNCTIONS
Supply Pins:
Power is supplied to the device through the
two supply pins
which must be connected together at all
times .
The supply pins should be bypassed to ground if
the device is more than six inches away from the main
supply capacitor. A bypass capacitor in the range of 0.1碌F
to 1碌F is sufficient. The supply voltage to the LT1313 can
be loosely regulated between 13V and 20V.
VPP
OUT
Pins:
Each regulated output supplies power to the
two PCMCIA card VPP pins which are typically tied to-
gether at the socket. Each VPP
OUT
output is current limited
to approximately 330mA. Thermal shutdown provides a
second level of protection. A 1碌F to 10碌F tantalum output
capacitor is recommended.
Input Enable Pins:
The four digital input pins are high
impedance inputs with approximately 20碌A(chǔ) input current
at 2.4V. The input thresholds are compatible with CMOS
controllers and can be driven from either 5V or 3.3V CMOS
logic. ESD protection diodes limit input excursions to 0.6V
below ground.
VALID Output Pins:
These pins are open-collector NPN
outputs which are driven low when the corresponding
VPP
OUT
pin is in regulation, i.e., when it is above 11V. Two
external 51k pull-up resistors are connected between
these outputs and the same 5V or 3.3V logic supply
powering the PCMCIA compatible control logic.
V
CC
Sense Pins:
Two independent comparators and 4V
references automatically switch the VPP
OUT
outputs from
5V to 3.3V depending upon the voltage sensed at the
corresponding PCMCIA card socket V
CC
pin. The input
current for these pins is approximately 30碌A(chǔ). For 5V only
operation, connect the Sense pins directly to ground. An
ESD protection diode limits the input voltage to 0.6V below
ground.
Ground Pins:
The two ground pins must be connected
together at all times.
BLOCK DIAGRAM
V
S
XV
CC
SENSE
+
鈥?/div>
4V
XVALID
XEN0
XEN1
X = A OR B
W
U
U
U
(One Channel)
LOW DROPOUT
LINEAR
REGULATOR
XVPP
OUT
+
VOLTAGE
LOGIC CONTROL
                        
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