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LH28F320BFE-PBTL60 Datasheet

  • LH28F320BFE-PBTL60

  • Sharp Electrionic Components [32M (x16) Flash Memory]

  • 907.35KB

  • SHARP

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LHF32FB3
4
Table 1. Pin Descriptions
Symbol
A
0
-A
20
Type
INPUT
INPUT/
OUTPUT
Name and Function
ADDRESS INPUTS: Inputs for addresses. 32M: A
0
-A
20
DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User
Interface) write cycles, outputs data during memory array, status register, query code,
identifier code and partition configuration register code reads. Data pins float to high-
impedance (High Z) when the chip or outputs are deselected. Data is internally latched
during an erase or program cycle.
CHIP ENABLE: Activates the device鈥檚 control logic, input buffers, decoders and sense
amplifiers. CE#-high (V
IH
) deselects the device and reduces power consumption to
standby levels.
RESET: When low (V
IL
), RST# resets internal automation and inhibits write operations
which provides data protection. RST#-high (V
IH
) enables normal operation. After
power-up or reset mode, the device is automatically set to read array mode. RST# must
be low during power-up/down.
OUTPUT ENABLE: Gates the device鈥檚 outputs during a read cycle.
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are
latched on the rising edge of CE# or WE# (whichever goes high first).
WRITE PROTECT: When WP#/ACC is V
IL
, locked-down blocks cannot be unlocked.
Erase or program operation can be executed to the blocks which are not locked and not
locked-down. When WP#/ACC is V
IH
, lock-down is disabled.
Applying 12V鹵0.3V to WP#/ACC provides fast erasing or fast programming mode. In
this mode, WP#/ACC is power supply pin. Applying 12V鹵0.3V to WP#/ACC during
erase/program can only be done for a maximum of 1,000 cycles on each block. WP#/
ACC may be connected to 12V鹵0.3V for a total of 80 hours maximum. Use of this pin at
12V beyond these limits may reduce block cycling capability or cause permanent
damage.
DQ
0
-DQ
15
CE#
INPUT
RST#
INPUT
OE#
WE#
INPUT
INPUT
WP#/ACC
INPUT/
SUPPLY
RY/BY#
READY/BUSY#: Indicates the status of the internal WSM (Write State Machine). When
OPEN DRAIN low, WSM is performing an internal operation (block erase, full chip erase, (page buffer)
program or OTP program). RY/BY#-High Z indicates that the WSM is ready for new
OUTPUT
commands, block erase is suspended and (page buffer) program is inactive, (page buffer)
program is suspended, or the device is in reset mode.
SUPPLY
SUPPLY
DEVICE POWER SUPPLY (2.7V-3.6V): With V
CC
鈮
LKO
, all write attempts to the
flash memory are inhibited. Device operations at invalid V
CC
voltage (see DC
Characteristics) produce spurious results and should not be attempted.
GROUND: Do not float any ground pins.
NO CONNECT: Lead is not internally connected; it may be driven or floated.
V
CC
GND
NC
Rev. 2.44

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