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CS8405 Datasheet

  • CS8405

  • 96 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER

  • 713.30KB

  • CIRRUS

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CS8405A
8.
8.1
7
0
CONTROL PORT REGISTER BIT DEFINITIONS
Control 1 (1h)
6
VSET
5
0
4
MUTEAES
3
0
2
INT1
1
INT0
0
TCBLD
VSET - Transmitted Validity bit level
Default = 鈥?鈥?/div>
0 - Indicates data is valid, linear PCM audio data
1 - Indicates data is invalid or not linear PCM audio data
MUTEAES - Mute control for the AES transmitter output
Default = 鈥?鈥?/div>
0 - Not Muted
1 - Muted
INT1:INT0 - Interrupt output pin (INT) control
Default = 鈥?0鈥?/div>
00 - Active high; high output indicates interrupt condition has occurred
01 - Active low, low output indicates an interrupt condition has occurred
10 - Open drain, active low. Requires an external pull-up resistor on the INT pin.
11 - Reserved
TCBLD - Transmit Channel Status Block pin (TCBL) direction specifier
Default = 鈥?鈥?/div>
0 - TCBL is an input
1 - TCBL is an output
DS469PP4
17

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