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CS493112-CL Datasheet

  • CS493112-CL

  • Multi-Standard Audio Decoder Family

  • 1338.66KB

  • CIRRUS

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CS49300 Family DSP
RESET(LOW)
(NOTE 1)
WRITE_*(DOWNLOAD_
BOOT, MSG_SIZE)
RESET(HIGH)
(NOTE 2)
WAIT
500
碌s
TIMEOUT AFTER
20MS
(NOTE 3)
N
INTREQ LOW?
Y
READ_*(MESSAGE)
WRITE_*(GFABTX.LD FILE,
DOWNLOAD FILE SIZE)
MESSAGE ==
BOOTSTART?
N
EXIT(ERROR)
Y
WAIT 135 MS, 100 MS,
OR 70 MS
(NOTE 5)
Notes: 1. RESET must be held LOWT
rstl
.
2. It should be noted that mode pins are used
to configure the CS493XX serial
communication mode. These mode pins are
latched internally on the rising edge of reset.
The pins can be set dynamically by a
microprocessor or can be statically pulled
HIGH or LOW. If these pins are driven
dynamically, setup and hold times must be
satisfied as stated in the
CS493XX Data
Sheet.
More information about the function
of the mode pins can be found in the
CS493XX Data Sheet and in
Section 6,
鈥淐ontrol鈥?on page 32.
3. Time-out values reflect worst case response
time for the CS493XX. The values shown
may be used for the host鈥檚 time-out control
loop.
4. Hardware configuration messages are
covered in
Section 6, 鈥淐ontrol鈥?on page 32.
Application configuration messages are
covered in each application code user鈥檚
manual.
5. INTREQ should be ignored during this
period. Depending on which GFABT code is
used, wait times can vary from 135 ms to 70
ms. All actual Autoboot times should be
verified by the designer.
6. The READ_* and WRITE_* functions are
placeholders for the READ_I2C/READ_SPI
and WRITE_I2C/WRITE_SPI functions
defined in
Section 6.1, 鈥淪erial
Communication鈥?on page 33.
READ_*(VARIABLE)
(NOTE 4)
CORRECT VALUE?
Y
N
WAIT 5 MS
AUTOBOOT COMPLETE
WRITE_*(HW_CONFIG_MSG,
HW_MSG_SIZE)
(NOTE 6)
WRITE_*(SW_CONFIG_MSG,
SW_MSG_SIZE)
(NOTE 6)
WRITE_*(KICKSTART,
MSG_SIZE)
(NOTE 6)
Figure 38. Fast Autoboot Sequence Using GFABT Codes
60
DS339PP4

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