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CS4611-CM Datasheet

  • CS4611-CM

  • CrystalClear SoundFusion PCI Audio Accelerator

  • CIRRUS

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CS4610/11
CrystalClear鈩?SoundFusion鈩?PCI Audio Accelerator
Analog Out Pair 2
Analog Out Pair 3
Surround Left
Surround Right
Center
Sub
Left
Right
Analog Out Pair 1
M C LK
SDATA
AOU TR
LRC LK
AO U TL
SC LK
M C LK
SDATA
AOU TR
LRC LK
AOU TL
SC LK
433xDAC
433xDAC
ROU T
LOU T
PLL/
Clock Gen
16.9344
JBB1/LRCLK
JAB1/SDO2
JAB2/SDO3
ABITCLK/SCLK
ASYNC/FSYNC
ASDOUT/SDOUT
ASDIN/SDIN
MCLK
SCLK
FSYNC
SDIN
SDOUT
MIDIIN
16.9344 MHz
MIDOUT
CS4610 PCI
Accelerator
CS423x
ISA Codec
Figure 11. CS4610 + CS423x Expanded 6-Channel Output Configuration
Pin Name
SCLK
FSYNC
Direction
Input
Input
SDOUT
Output
SDIN
Input
LRCLK
Output
SDO2, SDO3
Output
Functional Description
Main timing driver for digital audio link, both edges used internally for tim-
ing. Also functions as the source to the PLL for internal clock generation.
Framing signal for digital audio link, high time indicates left channel data
and low time indicates right channel data. FSYNC is sampled on the falling
edge of the SCLK input.
Primary output port serial data pin. This data is the CS4610 output stream
going to the CS423x DACs. SDOUT transitions on the rising edge of the
SCLK input.
Primary input port serial data pin. This data contains both CS423x ADC
data and the CS423x output data. SDIN is sampled on the falling edge of
the SCLK input.
Framing signal for external 4333 DACs, high time indicates left channel
data and low time indicates right channel data. LRCLK transitions on the
falling edge of the SCLK input.
Second and third output port serial data pins. These output streams are
the expanded output channels beyond the CS423x left / right pair. The
serial data on these pins transition on the falling edge of the SCLK input.
Note that this is a DIFFERENT SCLK edge than the one for the SDOUT
pin.
Table 4. Serial Audio Port Signal Summary for CS4610 + CS423x Expanded Output Configuration
DS241PP5
17

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