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CX25870 Datasheet

  • CX25870

  • Conexant Systems, Inc [Video Encoder with Adaptive Flicker ...

  • CONEXANT   CONEXANT

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CX25870/871
Flicker-Free Video Encoder with Ultrascale Technology
1.0 Functional Description
1.3 Device Description
After completion of the autoconfiguration command, the encoder expects to
receive interlaced CCIR601 data from the clock and timing master device at a rate
of 27.000 MHz. If this occurs, approximately 40 clocks later (i.e., pipeline delay),
the encoder begins transmitting a NTSC-compatible S-Video or Composite Video
signal containing the DVD movie.
1.3.39.2 CCIR601 Data
In/PAL Out
The second option is very similar to the first. In this scenario, the interlaced
CCIR601 video data is transmitted directly to the encoder from the MPEG2
decoder. However, instead of generating a NTSC signal, the encoder produces a
PAL-BDGHI compatible DVD movie output. The active resolution changes as
well for this alternative by increasing to 720x576.
To enable DVD playback in this scenario, the CX25870/871 must be
configured to accept interlaced 4:2:2 YCrCb data with an active resolution of
720x576 and output a standard PAL video output. The pertinent set of conditions
for this option are:
鈥?Type of Digital Video Input:
鈥?Active Resolution (HorizontalxVertical):
鈥?Overscan Compensation:
鈥?Interface:
鈥?Pixel Rate
鈥?Type of Analog Video Output:
Interlaced, 4:2:2 YCrCb
720 pixels x 576 lines
None. Horizontal = 0%; Vertical = 0%
CX25870/871 is clock and timing slave
27.000 MHz
Standard PAL[PAL-BDGHI]
Given this set of conditions, autoconfiguration mode 29 is a perfect fit for this
architectural option. As a result, simply use the MPEG2 decoder鈥檚 serial bus
mastering ability to program the CX25870/871s CONFIG[5:0] field with a binary
value of 011101. This translates into writing a hexadecimal number of 0x35 to
register 0xB8. Once the encoder acknowledges this write to its autoconfiguration
register, it automatically loads the appropriate value for this type of DVD
configuration into its register indices from 0x76 to 0xB4 including 0x38. The
exact data transferred into these registers is contained in
Appendix C.
After completion of the autoconfiguration command, the encoder expects to
receive interlaced CCIR601 data from the clock and timing master device at a rate
of 27.000 MHz. If this occurs, approximately 40 clocks later (i.e., pipeline delay),
the encoder will begin transmitting a PAL-compliant S-Video or Composite video
signal containing the DVD Movie.
1.3.39.3 VGA-
Compatible RGB Data
In/NTSC Out
The third option for DVD playback is unlike the previous two methods. In this
case, the MPEG2 decoder鈥檚 4:2:2 YCrCb interlaced data is sent as an input to the
graphics controller. In turn, the controller deinterlaces and color space converts
the CCIR601 data into a noninterlaced RGB format. The encoder finally ends up
receiving this standard VGA digital data from the graphics controllers digital
output port for generation into an analog TV signal.
100381B
Conexant
1-67

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CX25871

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