CS8416
SWITCHING CHARACTERISTICS - CONTROL PORT- I
2
C FORMAT
(T
A
= 25擄 C; VA+ = VD+ = 3.3 V 鹵 5%, VL = 3.135 V to 5.5 V Inputs: Logic 0 = GND, Logic 1 =
VL,
C
L
= 20 pF)
Parameter
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
(Note
12)
Symbol
f
scl
t
buf
t
hdst
t
low
t
high
t
sust
t
hdd
t
sud
t
r
t
f
t
susp
Min
-
4.7
4.0
4.7
4.0
4.7
10
250
-
-
4.7
Max
100
-
-
-
-
-
-
-
25
25
-
Unit
kHz
碌s
碌s
碌s
碌s
碌s
ns
ns
ns
ns
碌s
Notes: 12. Data must be held for sufficient time to bridge the 25 ns transition time of SCL.
Stop
SDA
t buf
SCL
Start
Repeated
Start
Stop
t hdst
t high
t
hdst
tf
t susp
t
low
t
hdd
t sud
t sust
tr
Figure 4. I
2
C Mode Timing
DS578PP2
9