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CS5340-CZZ Datasheet

  • CS5340-CZZ

  • Cirrus Logic [101 dB, 192kHz, MULTI-BIT AUDIO A/D CONVERTER...

  • CIRRUS

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CS5340
LIST OF FIGURES
Figure 1. Single Speed Mode Stopband Rejection ....................................................................... 10
Figure 2. Single Speed Mode Stopband Rejection ....................................................................... 10
Figure 3. Single Speed Mode Transition Band (Detail)................................................................. 10
Figure 4. Single Speed Mode Passband Ripple ........................................................................... 10
Figure 5. Double Speed Mode Stopband Rejection...................................................................... 10
Figure 6. Double Speed Mode Stopband Rejection...................................................................... 10
Figure 7. Double Speed Mode Transition Band (Detail) ............................................................... 11
Figure 8. Double Speed Mode Passband Ripple .......................................................................... 11
Figure 9. Quad Speed Mode Stopband Rejection ........................................................................ 11
Figure 10. Quad Speed Mode Stopband Rejection ...................................................................... 11
Figure 11. Quad Speed Mode Transition Band (Detail) ................................................................ 11
Figure 12. Quad Speed Mode Passband Ripple........................................................................... 11
Figure 13. Master Mode, Left Justified SAI ................................................................................... 14
Figure 14. Slave Mode, Left Justified SAI ..................................................................................... 14
Figure 15. Master Mode, I
2
S SAI .................................................................................................. 14
Figure 16. Slave Mode, I
2
S SAI .................................................................................................... 14
Figure 17. Typical Connection Diagram........................................................................................ 16
Figure 18. CS5340 Master Mode Clocking ................................................................................... 18
Figure 19. Left-Justified Serial Audio Interface ............................................................................. 19
Figure 20. I
2
S Serial Audio Interface............................................................................................. 19
Figure 21. CS5340 Recommended Analog Input Buffer............................................................... 20
Figure 22. CS5340 THD+N versus Frequency ............................................................................. 21
LIST OF TABLES
Table 1. Speed Modes and the Associated Output Sample Rates (Fs)........................................ 17
Table 2. CS5340 Mode Control..................................................................................................... 17
Table 3. Master Clock (MCLK) Ratios........................................................................................... 19
Table 4. Master Clock (MCLK) Frequencies for Standard Audio Sample Rates .......................... 19
Table 5. Revision History .............................................................................................................. 24
DS601PP2
3

CS5340-CZZ 產(chǎn)品屬性

  • 96

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 24

  • 200k

  • 串行

  • 2

  • -

  • 單電源

  • -10°C ~ 70°C

  • 表面貼裝

  • 16-TSSOP（0.173"，4.40mm 寬）

  • 16-TSSOP

  • 管件

  • 2 個單端，單極

  • 598-1544-ND - BOARD EVAL FOR CS5340 STEREO ADC

  • 598-1081-5

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