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AT24C16-10PC Datasheet

  • AT24C16-10PC

  • ATMEL Corporation [2-Wire Serial EEPROM]

  • ATMEL   ATMEL

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ACKNOWLEDGE POLLING:
Once the internally timed write cycle has started and the
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a
start condition followed by the device address word. The read/write bit is representative of the
operation desired. Only if the internal write cycle has completed will the EEPROM respond
with a zero allowing the read or write sequence to continue.
Read
Operations
Read operations are initiated the same way as write operations with the exception that the
read/write select bit in the device address word is set to one. There are three read operations:
current address read, random address read and sequential read.
CURRENT ADDRESS READ:
The internal data word address counter maintains the last
address accessed during the last read or write operation, incremented by one. This address
stays valid between operations as long as the chip power is maintained. The address 鈥渞oll
over鈥?during read is from the last byte of the last memory page to the first byte of the first page.
The address 鈥渞oll over鈥?during write is from the last byte of the current page to the first byte of
the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowl-
edged by the EEPROM, the current address data word is serially clocked out. The
microcontroller does not respond with an input zero but does generate a following stop condi-
tion (see Figure 10 on page 12).
RANDOM READ:
A random read requires a 鈥渄ummy鈥?byte write sequence to load in the data
word address. Once the device address word and data word address are clocked in and
acknowledged by the EEPROM, the microcontroller must generate another start condition.
The microcontroller now initiates a current address read by sending a device address with the
read/write select bit high. The EEPROM acknowledges the device address and serially clocks
out the data word. The microcontroller does not respond with a zero but does generate a fol-
lowing stop condition (see Figure 11 on page 12).
SEQUENTIAL READ:
Sequential reads are initiated by either a current address read or a ran-
dom address read. After the microcontroller receives a data word, it responds with an
acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment
the data word address and serially clock out sequential data words. When the memory
address limit is reached, the data word address will 鈥渞oll over鈥?and the sequential read will con-
tinue. The sequential read operation is terminated when the microcontroller does not respond
with a zero but does generate a following stop condition (see Figure 12 on page 12).
10
AT24C01A/02/04/08A/16A
0180V鈥揝EEPR鈥?/05

AT24C16-10PC PDF文件相關(guān)型號

AT24CXX

AT24C16-10PC 產(chǎn)品屬性

  • Atmel

  • 電可擦除可編程只讀存儲器

  • 16 Kbit

  • 256 x 8

  • 100 yr

  • 0.4 MHz

  • 3 mA

  • 1.8 V, 5.5 V

  • + 70 C

  • Through Hole

  • PDIP-8

  • 900 ns

  • 2-Wire

  • 0 C

  • 50

  • 5.5 V

  • 4.5 V

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