REF鈥?/div>
SIGNAL GROUND
R
IN
V
SS
DGND
R3
100k
鈥?5V
*ADDITIONAL PINS
OMITTED FOR CLARITY
*ADDITIONAL PINS
OMITTED FOR CLARITY
鈥?5V
Figure 19. Bipolar
鹵
10 V Operation
Table IV. Offset Binary Code Table for Figure 19
Figure 20. Unipolar Output with AD689
Table V. Code Table for Figure 20
Binary Number
in DAC Latch
MSB
LSB
1111 1111 1111 1111
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0000 0000 0000 0000
Analog Output
(V
OUT
)
+10 (32767/32768) V
+10 (1/32768) V
0V
鈥?0 (1/32768) V
鈥?0 (32768/32768) V
Binary Number
in DAC Latch
MSB
LSB
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 1000
0000 0000 0000 0100
0000 0000 0000 0010
0000 0000 0000 0001
NOTE
1 LSB = 8.192 V/2
l6
= 125
碌V.
Analog Output
(V
OUT
)
8.192 V (65535/65536) = 8.1919 V
8.192 V (32768/65536) = 4.096 V
8.192 V (8/65536) = 0.001 V
8.192 V (4/65536) = 0.0005 V
8.192 V (2/65536) = 0.00025 V
8.192 V (1/65536) = 0.000125 V
NOTE
1 LSB = 10 V/2
15
= 10 V/32768 = 305
碌V.
Full scale and bipolar zero adjustment are provided by varying
the gain and balance on the AD588. R2 varies the gain on the
AD588 while R3 adjusts the +5 V and 鈥? V outputs together
with respect to ground.
For bipolar zero adjustment on the AD7846, load the DAC with
100 . . . 000 and adjust R3 until V
OUT
= 0 V. Full scale is ad-
justed by loading the DAC with all 1s and adjusting R2 until
V
OUT
= 9.999694 V.
When bipolar zero and full scale adjustment are not needed, R2
and R3 can be omitted, Pin 12 on the AD588 should be con-
nected to Pin 11 and Pin 5 should be left floating. If a user
wants a +5 V output range, there are two choices. By tying Pin
6 (R
IN
) of the AD7846 to V
OUT
(Pin 5), the output stage gain is
reduced to unity and the output range is
鹵
5 V. If only a positive
+5 V reference is available, bipolar
鹵
5 V operation is still pos-
sible. Tie V
REF鈥?/div>
to 0 V and connect R
IN
to V
REF+
. This will also
give a
鹵
5 V output range. However, the linearity, gain, and
offset error specifications will be the same as the unipolar 0 V to
+5 V range.
Multiplying Operation
The AD7846 is a full multiplying DAC. To get four-quadrant
multiplication, tie V
REF鈥?/div>
to 0 V, apply the ac input to V
REF+
and
tie R
IN
to V
REF+
. Figure 6 shows the Large Signal Frequency
Response when the DAC is used in this fashion.
REV. E
鈥?鈥?/div>
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