最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

AD7846AP Datasheet

  • AD7846AP

  • 16-Bit Voltage Output DAC

  • AD

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

AD7846
POSITION MEASUREMENT APPLICATION
Figure 22 shows the AD7846 in a position measurement appli-
cation using an LVDT (Linear Variable Displacement Trans-
ducer), an AD630 synchronous demodulator and a comparator
to make a 16-bit LVDT-to-Digital Converter. The LVDT is
excited with a fixed frequency and fixed amplitude sine wave
(usually 2.5 kHz, 2 V pk-pk). The outputs of the secondary coil
are in antiphase and their relative amplitudes depend on the
position of the core in the LVDT. The AD7846 output interpo-
lates between these two inputs in response to the DAC input
code. The AD630 is set up so that it rectifies the DAC output
signal. Thus, if the output of the DAC is in phase with the
V
REF+
input, the inverting input to the comparator will be posi-
tive, and if it is in phase with V
REF鈥?
the output will be negative.
By turning on each bit of the DAC in succession starting with
the MSB, and deciding to leave it on or turn it off based on the
comparator output, a 16-bit measurement of the core position is
obtained.
ASIN
t
LVDT
x ASIN
t
V
REF+
V
OUT
R
IN
In a multiple DAC system, the double buffering of the AD7846
allows the user to simultaneously update all DACs. In Figure
24, a 16-bit word is loaded to the input latches of each of the
DACs in sequence. Then, with one instruction to the appropri-
ate address,
CS4
(i.e.,
LDAC)
is brought low, updating all the
DACs simultaneously.
ADDRESS BUS
ADDRESS
DECODE
ALE
16-BIT
LATCH
CS
AD7846*
LDAC
8086
DEN
RD
WR
AD0鈥揂D15
DATA BUS
R/W
CLR
DB0鈥揇B15
+5V
CS
AD7846*
LDAC
R/W
CLR
DB0鈥揇B15
SIGNAL
GROUND
AD7846*
鈥?1鈥搙)ASIN
t
V
REF鈥?/div>
DGND
DB15 DB0
+5V
*ADDITIONAL PINS
OMITTED FOR CLARITY
CS
PROCESSOR DATA BUS
AD7846*
LDAC
R/W
R1
100k
C1
1 F
AD630*
*LINEAR CIRCUITRY
OMITTED FOR CLARITY
CLR
DB0鈥揇B15
+5V
TO
PROCESSOR PORT
Figure 24. AD7846-to-8086 Interface: Multiple DAC System
AD7846-to-MC68000 Interface
Figure 22. AD7846 in Position Measurement Application
MICROPROCESSOR INTERFACING
AD7846-to-8086 Interface
Interfacing between the AD7846 and MC68000 is accom-
plished using the circuit of Figure 25. The following routine
writes data to the DAC latches and then outputs the data via the
DAC latch.
1000
MOVE.W #W, D0
The desired DAC data, W,
is loaded into Data Regis-
ter 0. W may be any value
between 0 and 65535
(decimal) or 0 and FFFF
(hexadecimal).
The data, W, is transferred
between D0 and the DAC
register.
Control is returned to the
System Monitor using
these two instructions.
Figure 23 shows the 8086 16-bit processor interfacing to the
AD7846. The double buffering feature of the DAC is not used
in this circuit since
LDAC
is permanently tied to 0 V. AD0鈥?/div>
AD15 (the 16-bit data bus) are connected to the DAC data bus
(DB0鈥揇B15). The 16-bit word is written to the DAC in one
MOV instruction and the analog output responds immediately.
In this example, the DAC address is D000H.
ADDRESS BUS
MOVE.W D0, $E000
ADDRESS
DECODE
ALE
16-BIT
LATCH
+5V
CS
LDAC
CLR
MOVE.W #228, D7
TRAP
#14
8086
DEN
RD
WR
AD0鈥揂D15
DATA BUS
*LINEAR CIRCUITRY
OMITTED FOR CLARITY
AD7846*
R/W
DB0鈥揇B15
Figure 23. AD7846-to-8086 Interface Circuit
REV. E
鈥?1鈥?/div>

AD7846AP 產(chǎn)品屬性

  • Data Converter FundamentalsDAC Architectures

  • 1

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器

  • -

  • 7µs

  • 16

  • 并聯(lián)

  • 1

  • 雙 ±

  • 100mW

  • -40°C ~ 85°C

  • 表面貼裝

  • 28-LCC(J 形引線)

  • 28-PLCC(11.51x11.51)

  • 管件

  • 1 電壓,單極;1 電壓,雙極

  • 143k

AD7846AP相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    2.5 V/3.0 V High Precision Reference
    AD
  • 英文版
    2.5V/3.0V High Precision Reference
  • 英文版
    Complete 700 ns Sample-and-Hold Amplifier
    AD
  • 英文版
    Complete 700 ns Sample-and-Hold Amoplifier
  • 英文版
    Complete Very High Speed Sample-and-Hold Amplifier
  • 英文版
    +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC
    AD
  • 英文版
    +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC
  • 英文版
    +3.3 V to +5 V Quad/Octal 10-Bit DACs
    AD
  • 英文版
    3.3 V to 5 V Quad/Octal 10-Bit DACs
  • 英文版
    +3.3 V to +5 V Quad/Octal 10-Bit DACs
    AD
  • 英文版
    3.3 V to 5 V Quad/Octal 10-Bit DACs
  • 英文版
    AD7804/AD7805/AD7806/AD7809: +3.3 V to +5 V Quad/Octal 10-B...
    ETC
  • 英文版
    AD7804/AD7805/AD7806/AD7809: +3.3 V to +5 V Quad/Octal 10-B...
  • 英文版
    +3.3 V to +5 V Quad/Octal 10-Bit DACs
    AD
  • 英文版
    3.3 V to 5 V Quad/Octal 10-Bit DACs
  • 英文版
    +3.3 V to +5 V Quad/Octal 10-Bit DACs
    AD
  • 英文版
    3.3 V to 5 V Quad/Octal 10-Bit DACs
  • 英文版
    Complete 700 ns Sample-and-Hold Amplifier
    ETC
  • 英文版
    Complete 700 ns Sample-and-Hold Amplifier
  • 英文版
    2.7 V to 5.5 V, 2 us, 10-Bit ADC in 8-Lead microSOIC/DIP
    AD

掃碼下載APP,
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù):
賣家服務(wù):
技術(shù)客服:

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào),
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人:

聯(lián)系方式:

按住滑塊,拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見,您的參與是維庫提升服務(wù)的動(dòng)力!意見一經(jīng)采納,將有感恩紅包奉上哦!