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PIC18F8620 Datasheet

  • PIC18F8620

  • 64/80-Pin High-Performance,256 Kbit to 1 Mbit Enhanced Flash...

  • 380頁

  • Microchip   Microchip

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PIC18F6520/8520/6620/8620/6720/8720
REGISTER 9-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
U-0
鈥?/div>
bit 7
bit 7
bit 6
Unimplemented:
Read as 鈥?鈥?/div>
CMIF:
Comparator Interrupt Flag bit
1
= The comparator input has changed (must be cleared in software)
0
= The comparator input has not changed
Unimplemented:
Read as 鈥?鈥?/div>
EEIF:
Data EEPROM/Flash Write Operation Interrupt Flag bit
1
= The write operation is complete (must be cleared in software)
0
= The write operation is not complete, or has not been started
BCLIF:
Bus Collision Interrupt Flag bit
1
= A bus collision occurred while the SSP module (configured in I
2
C Master mode)
was transmitting (must be cleared in software)
0
= No bus collision occurred
LVDIF:
Low-Voltage Detect Interrupt Flag bit
1
= A low-voltage condition occurred (must be cleared in software)
0
= The device voltage is above the Low-Voltage Detect trip point
TMR3IF:
TMR3 Overflow Interrupt Flag bit
1
= TMR3 register overflowed (must be cleared in software)
0
= TMR3 register did not overflow
CCP2IF:
CCP2 Interrupt Flag bit
Capture mode:
1
= A TMR1 or TMR3 register capture occurred (must be cleared in software)
0
= No TMR1 or TMR3 register capture occurred
Compare mode:
1
= A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0
= No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
鈥?鈥?= Bit is set
U = Unimplemented bit, read as 鈥?鈥?/div>
鈥?鈥?= Bit is cleared
x = Bit is unknown
R/W-0
CMIF
U-0
鈥?/div>
R/W-0
EEIF
R/W-0
BCLIF
R/W-0
LVDIF
R/W-0
TMR3IF
R/W-0
CCP2IF
bit 0
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
錚?/div>
2004 Microchip Technology Inc.
DS39609B-page 93

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