Getting Started
2.3.1.4
Disabling the MCP2120
Figure 2.5 shows the jumper, JP4, which will enable or disable the MCP2120
device. When the MCP2120 is disabled, the device will consume less current.
Figure 2.5: MCP2120 Enable/Disable
R9
D3
D6 D2
C17
C11
U2
C18
C6
R3
Y1
J5
CR1
D4
C15
C4
C7
C12
C13
C14
JP5 R1
Q1
U3
C9
C5
C1
R14
R2
C2
JP3:JP1
000=F
OSC
/768
001=F
OSC
/384
010=F
OSC
/192
011=F
OSC
/128
100=F
OSC
/64
111=S/W
Baud
Open=0
MODE
RTS
Integrated
Transceiver
R13
C16
U6
C8
C10
R4
JP4
R10
U4
R5
R11
D1
D5
R12
R15
U5
(MCP2120)
Open=Enabled
R8
R7
R6
Component
Transceiver
J7
J6
C3
DB9
RX
J2
MCP2120
Developer鈥檚 Board
02-01608 Rev. 1
TX
J4
J1
Header
U1
J3
+5V
GND
MCP2120 Enable/Disable
Enabled
Disabled
In most cases, this jumper will be open. It may be closed to test system
operation when the MCP2120 is disabled. The Host Controller board may
control the operation of the MCP2120 by connecting a signal to the JP4
header as shown in Figure 2.6.
Figure 2.6: Host Controller Disabling the MCP2120
MCP2120 Developer鈥檚 Board
Host Controller
MCP2120
EN
JP4
I/O Pin
(High or Hi Impedance = Enabled
Low = Disabled)
錚?/div>
2001 Microchip Technology Inc.
DS51246A-page 11
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