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dsPIC33FJ32GP204 Datasheet

  • dsPIC33FJ32GP204

  • High-Performance,16-bit Digital Signal Controllers

  • 2082.75KB

  • 270頁

  • Microchip   Microchip

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dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
REGISTER 7-1:
U-0
鈥?/div>
bit 15
R/W-0
CLKLOCK
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
y = Value set from Configuration bits on POR
W = Writable bit
鈥?鈥?= Bit is set
U = Unimplemented bit, read as 鈥?鈥?/div>
鈥?鈥?= Bit is cleared
x = Bit is unknown
R/W-0
IOLOCK
R-0
LOCK
U-0
鈥?/div>
R/C-0
CF
U-0
鈥?/div>
R/W-0
LPOSCEN
OSCCON: OSCILLATOR CONTROL REGISTER
R-0
R-0
COSC<2:0>
R-0
U-0
鈥?/div>
R/W-y
R/W-y
NOSC<2:0>
bit 8
R/W-0
OSWEN
bit 0
R/W-y
Unimplemented:
Read as 鈥?鈥?/div>
COSC<2:0>:
Current Oscillator Selection bits (read-only)
000
= Fast RC oscillator (FRC)
001
= Fast RC oscillator (FRC) with PLL
010
= Primary oscillator (XT, HS, EC)
011
= Primary oscillator (XT, HS, EC) with PLL
100
= Secondary oscillator (SOSC)
101
= Low-Power RC oscillator (LPRC)
110
= Fast RC oscillator (FRC) with Divide-by-16
111
= Fast RC oscillator (FRC) with Divide-by-n
Unimplemented:
Read as 鈥?鈥?/div>
NOSC<2:0>:
New Oscillator Selection bits
000
= Fast RC oscillator (FRC)
001
= Fast RC oscillator (FRC) with PLL
010
= Primary oscillator (XT, HS, EC)
011
= Primary oscillator (XT, HS, EC) with PLL
100
= Secondary oscillator (SOSC)
101
= Low-Power RC oscillator (LPRC)
110
= Fast RC oscillator (FRC) with Divide-by-16
111
= Fast RC oscillator (FRC) with Divide-by-n
CLKLOCK:
Clock Lock Enable bit
If clock switching is enabled and FSCM is disabled (FOSC<FCKSM> = 0b01)
1
= Clock switching is disabled, system clock source is locked
0
= Clock switching is enabled, system clock source can be modified by clock switching
IOLOCK:
Peripheral Pin Select Lock bit
1
= Peripherial Pin Select is locked, write to peripheral pin select register is not allowed
0
= Peripherial Pin Select is unlocked, write to peripheral pin select register is allowed
LOCK:
PLL Lock Status bit (read-only)
1
= Indicates that PLL is in lock, or PLL start-up timer is satisfied
0
= Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
Unimplemented:
Read as 鈥?鈥?/div>
CF:
Clock Fail Detect bit (read/clear by application)
1
= FSCM has detected clock failure
0
= FSCM has not detected clock failure
Unimplemented:
Read as 鈥?鈥?/div>
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
DS70290A-page 92
Preliminary
漏
2007 Microchip Technology Inc.

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