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dsPIC33FJ32GP204 Datasheet

  • dsPIC33FJ32GP204

  • High-Performance,16-bit Digital Signal Controllers

  • 270頁(yè)

  • Microchip   Microchip

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dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
3.6.2
DATA ACCESS FROM PROGRAM
MEMORY USING TABLE
INSTRUCTIONS
In Byte mode, either the upper or lower byte of the
lower program word is mapped to the lower byte of
a data address. The upper byte is selected when
Byte Select is 鈥?鈥? the lower byte is selected when
it is 鈥?鈥?
鈥?/div>
TBLRDH (Table
Read High): In Word mode, this
instruction maps the entire upper word of a program
address (P<23:16>) to a data address. Note that
D<15:8>, the 鈥榩hantom byte鈥? will always be 鈥?鈥?
In Byte mode, this instruction maps the upper or
lower byte of the program word to D<7:0> of the
data address, as in the
TBLRDL
instruction. Note
that the data will always be 鈥?鈥?when the upper
鈥榩hantom鈥?byte is selected (Byte Select =
1).
In a similar fashion, two table instructions,
TBLWTH
and
TBLWTL,
are used to write individual bytes or
words to a program space address. The details of
their operation are explained in
Section 4.0 鈥淔lash
Program Memory鈥?
For all table operations, the area of program memory
space to be accessed is determined by the Table Page
register (TBLPAG). TBLPAG covers the entire program
memory space of the device, including user and config-
uration spaces. When TBLPAG<7> =
0,
the table page
is located in the user memory space. When
TBLPAG<7> =
1,
the page is located in configuration
space.
The
TBLRDL
and
TBLWTL
instructions offer a direct
method of reading or writing the lower word of any
address within the program space without going
through data space. The
TBLRDH
and
TBLWTH
instructions are the only method to read or write the
upper 8 bits of a program space word as data.
The PC is incremented by two for each successive
24-bit program word. This allows program memory
addresses to directly map to data space addresses.
Program memory can thus be regarded as two
16-bit-wide word address spaces, residing side by side,
each with the same address range.
TBLRDL
and
TBL-
WTL
access the space that contains the least significant
data word.
TBLRDH
and
TBLWTH
access the space that
contains the upper data byte.
Two table instructions are provided to move byte or
word sized (16-bit) data to and from program space.
Both function as either byte or word operations.
鈥?/div>
TBLRDL
(Table Read Low): In Word mode, this
instruction maps the lower word of the program
space location (P<15:0>) to a data address
(D<15:0>).
FIGURE 3-8:
TBLPAG
ACCESSING PROGRAM MEMORY WITH TABLE INSTRUCTIONS
Program Space
23
15
0
02
0x000000
00000000
00000000
00000000
00000000
23
16
8
0
0x020000
0x030000
鈥楶hantom鈥?Byte
TBLRDH.B
(Wn<0> =
0)
TBLRDL.B
(Wn<0> =
1)
TBLRDL.B
(Wn<0> =
0)
TBLRDL.W
The address for the table operation is determined by the data EA
within the page defined by the TBLPAG register.
Only read operations are shown; write operations are also valid in
the user memory area.
0x800000
漏
2007 Microchip Technology Inc.
Preliminary
DS70290A-page 47

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