dsPIC33FJ32GP204 Datasheet

IC型號(hào)：
dsPIC33FJ32GP204
PDF描述：
High-Performance,16-bit Digital Signal Controllers
文件大?。?/label>
2082.75KB
PDF頁數(shù)：
270頁
芯片廠家：
Microchip

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TABLE 3-5:

Bit 14

Timer1 Register

Period Register 1

鈥?/div>

Timer2 Register

Timer3 Holding Register (for 32-bit timer operations only)

Timer3 Register

Period Register 2

Period Register 3

鈥?/div>

TSIDL

鈥?/div>

TGATE

TCKPS<1:0>

鈥?/div>

TSIDL

鈥?/div>

TGATE

TCKPS<1:0>

T32

鈥?/div>

TCS

鈥?/div>

TSIDL

鈥?/div>

TGATE

TCKPS<1:0>

鈥?/div>

TSYNC

TCS

鈥?/div>

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

xxxx

FFFF

0000

xxxx

FFFF

0000

TIMER REGISTER MAP

SFR Name

SFR

Addr

Bit 15

TMR1

0100

DS70290A-page 32

Bit 14

Input 1 Capture Register

鈥?/div>

Input 2 Capture Register

鈥?/div>

Input 7 Capture Register

鈥?/div>

Input 8Capture Register

鈥?/div>

ICSIDL

鈥?/div>

ICTMR

ICI<1:0>

ICOV

ICBNE

ICM<2:0>

ICSIDL

鈥?/div>

ICTMR

ICI<1:0>

ICOV

ICBNE

ICM<2:0>

ICSIDL

鈥?/div>

ICTMR

ICI<1:0>

ICOV

ICBNE

ICM<2:0>

ICSIDL

鈥?/div>

ICTMR

ICI<1:0>

ICOV

ICBNE

ICM<2:0>

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

xxxx

0000

xxxx

0000

xxxx

0000

xxxx

0000

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

xxxx

Output Compare 1 Register

鈥?/div>

OCSIDL

鈥?/div>

Output Compare 2 Register

鈥?/div>

OCSIDL

鈥?/div>

OCFLT

OCTSEL

OCM<2:0>

鈥?/div>

Output Compare 2 Secondary Register

鈥?/div>

OCFLT

OCTSEL

OCM<2:0>

xxxx

0000

xxxx

0000

Output Compare 1 Secondary Register

PR1

0102

T1CON

0104

TON

TMR2

0106

TMR3HLD

0108

TMR3

010A

PR2

010C

PR3

010E

T2CON

0110

TON

T3CON

0112

TON

Legend:

= unknown value on Reset, 鈥?= unimplemented, read as 鈥?鈥? Reset values are shown in hexadecimal.

TABLE 3-6:

INPUT CAPTURE REGISTER MAP

SFR Name

SFR

Addr

Bit 15

IC1BUF

0140

IC1CON

0142

鈥?/div>

IC2BUF

0144

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304

Preliminary

IC2CON

0146

鈥?/div>

IC7BUF

0158

IC7CON

015A

鈥?/div>

IC8BUF

015C

IC8CON

015E

鈥?/div>

Legend:

= unknown value on Reset, 鈥?= unimplemented, read as 鈥?鈥? Reset values are shown in hexadecimal.

TABLE 3-7:

OUTPUT COMPARE REGISTER MAP

SFR Name

SFR

Addr

Bit 15

OC1RS

0180

OC1R

0182

OC1CON

0184

鈥?/div>

OC2RS

0186

OC2R

0188

OC2CON

018A

鈥?/div>

漏

2007 Microchip Technology Inc.

Legend:

= unknown value on Reset, 鈥?= unimplemented, read as 鈥?鈥? Reset values are shown in hexadecimal.

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