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DSPIC33FJ256MC710 Datasheet

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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
6.2
Programming Verification
Reading the contents of executive memory can be
performed using the same technique described in
Section 5.8 鈥淩eading Code Memory鈥?
A procedure
for reading executive memory is shown in Table 6-2.
Note that in Step 2, the TBLPAG register is set to 0x80,
such that executive memory may be read.
After the programming executive has been
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
TABLE 6-2:
Command
(Binary)
READING EXECUTIVE MEMORY
Data
(Hex)
Description
Step 1:
Exit the Reset vector.
0000
0000
0000
0000
0000
0000
0000
0000
000000
000000
040200
000000
200800
880190
EB0300
207847
NOP
NOP
GOTO
NOP
MOV
MOV
CLR
MOV
0x200
Step 2:
Initialize TBLPAG and the read pointer (W6) for
TBLRD
instruction.
#0x80, W0
W0, TBLPAG
W6
#VISI, W7
Step 3:
Initialize the write pointer (W7) to point to the VISI register.
Step 4:
Read and clock out the contents of the next two locations of executive memory through the VISI register
using the
REGOUT
command.
0000
0000
0000
0000
0001
0000
0000
0000
0001
0000
0000
000000
BA1B96
000000
000000
<VISI>
BA9BB6
000000
000000
<VISI>
040200
000000
NOP
TBLRDL [W6], [W7]
NOP
NOP
Clock out contents of VISI register
TBLRDH [W6++], [W7]
NOP
NOP
Clock out contents of VISI register
GOTO
NOP
0x200
Step 5:
Reset the device internal PC.
Step 6:
Repeat Steps 4-5 until all 2048 instruction words of executive memory are read.
漏
2007 Microchip Technology Inc.
Preliminary
DS70152D-page 71

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