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DSPIC33FJ256MC710 Datasheet

  • DSPIC33FJ256MC710

  • 342頁

  • MICROCHIP   MICROCHIP

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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
4.2.8
15
Opcode
Reserved
Addr_LS
Data
Field
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
0x4
0x4
0x0
MSB of 24-bit destination address
Least Significant 16 bits of 24-bit
destination address
8-bit data word
Field
Opcode
Length
Reserved
Addr_MSB
Addr_LS
D_1
D_2
...
D_96
0x5
0x63
0x0
MSB of 24-bit destination address
Least Significant 16 bits of 24-bit
destination address
16-bit data word 1
16-bit data word 2
16-bit data word 3 through 95
16-bit data word 96
Description
Description
PROGC
COMMAND
12 11
8 7
Length
Addr_MSB
0
4.2.9
15
Opcode
PROGP
COMMAND
12 11
Reserved
Addr_LS
D_1
D_2
...
D_N
8 7
Length
Addr_MSB
0
The
PROGC
command instructs the programming exec-
utive to program a single Configuration register, located
at the specified memory address.
After the specified data word has been programmed to
code memory, the programming executive verifies the
programmed data against the data in the command.
Expected Response (2 words):
0x1400
0x0002
The
PROGP
command instructs the programming exec-
utive to program one row of code memory
(64 instruction words) to the specified memory
address. Programming begins with the row address
specified in the command. The destination address
should be a multiple of 0x80.
The data to program to memory, located in command
words D_1 through D_96, must be arranged using the
packed instruction word format shown in Figure 4-4.
After all data has been programmed to code memory,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
0x1500
0x0002
Note:
Refer to Table 2-2 for code memory size
information.
2007 Microchip Technology Inc.
Preliminary
DS70152D-page 51

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