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AD5243/AD5248

1

SCL

SDA

04109-0-023

9

1

9

1

9

0

1

0

1

1

AD1 AD0 R/W

A0

SD

X

X

X

X

X

X

D7

ACK BY

AD5248

D6

D5

D4

D3

D2

D1

D0

ACK BY

AD5248

ACK BY

AD5248

START BY

MASTER

FRAME 1

SLAVE ADDRESS BYTE

FRAME 2

INSTRUCTION BYTE

FRAME 3

DATA BYTE

STOP BY

MASTER

Figure 47. Writing to the RDAC Register鈥擜D5248

1

SCL

SDA

0

1

0

1

1

1

1 R/W

9

1

9

D7

ACK BY

AD5243

D6

D5

D4

D3

D2

D1

D0

04109-0-024

04109-0-025

NO ACK

BY MASTER

FRAME 2

RDAC REGISTER

STOP BY

MASTER

START BY

MASTER

FRAME 1

SLAVE ADDRESS BYTE

Figure 48. Reading Data from a Previously Selected RDAC Register in Write Mode鈥擜D5243

1

SCL

SDA

0

1

0

1

1

AD1 AD0 R/W

9

1

9

D7

D6

D5

D4

D3

D2

D1

D0

NO ACK

BY MASTER

ACK BY

AD5248

START BY

MASTER

FRAME 1

SLAVE ADDRESS BYTE

FRAME 2

RDAC REGISTER

STOP BY

MASTER

Figure 49. Reading Data from a Previously Selected RDAC Register in Write Mode鈥擜D5248

Multiple Devices on One Bus (Applies Only to AD5248)

Figure 50 shows four AD5248 devices on the same serial bus.

Each has a different slave address, because the states of their

AD0 and AD1 pins are different. This allows each device on the

bus to be written to or read from independently. The master

device output bus line drivers are open-drain pull-downs in a

fully I

2

C compatible interface.

R

P

R

P

5V

SDA

MASTER

SCL

5V

SDA

AD1

AD0

SCL

SDA

AD1

AD0

SCL

5V

SDA

AD1

AD0

SCL

5V

SDA

AD1

04109-0-026

SCL

AD0

AD5248

AD5248

AD5248

AD5248

Figure 50. Multiple AD5248 Devices on One I

2

C Bus

Rev. 0 | Page 18 of 20

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