AD5243/AD5248
Table 9. Write Mode
AD5243
S
0
1
0
1
1
1
1
W
A
A0
SD
X
X
X
X
X
X
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Instruction Byte
Data Byte
AD5248
S
0
1
0
1
1
AD1
AD0
W
A
A0
SD
X
X
X
X
X
X
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Instruction Byte
Data Byte
Table 10. Read Mode
AD5243
S
0
1
0
1
1
1
1
R
A
D7
D6
D5
D4
D3
Data Byte
D2
D1
D0
A
P
Slave Address Byte
AD5248
S
0
1
0
1
1
AD1
AD0
R
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Data Byte
LEGEND
S = Start condition.
P = Stop condition.
A = Acknowledge.
X = Don鈥檛 care.
W = Write.
AD0, AD1 = Package pin
programmable address bits.
R = Read.
A0 = RDAC subaddress select bit.
SD = Shutdown connects wiper to B terminal and
open circuits A terminal. It does not change contents
of wiper register.
D7, D6, D5, D4, D3, D2, D1, D0 = Data bits.
t
8
SCL
t
6
t
9
t
2
t
2
t
3
t
8
t
9
t
4
t
7
t
5
t
10
SDA
t
1
P
S
S
P
Figure 45. I
2
C Interface Detailed Timing Diagram
1
SCL
SDA
9
1
9
1
9
ACK BY
AD5243
START BY
MASTER
FRAME 1
SLAVE ADDRESS BYTE
FRAME 2
INSTRUCTION BYTE
ACK BY
AD5243
FRAME 3
DATA BYTE
ACK BY
AD5243
STOP BY
MASTER
Figure 46. Writing to the RDAC Register鈥擜D5243
Rev. 0 | Page 17 of 20
04109-0-022
0
1
0
1
1
1
1
R/W
A0
SD
X
X
X
X
X
X
D7
D6
D5
D4
D3
D2
D1
D0
04109-0-021