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AD5243 Datasheet

  • AD5243

  • Dual 256-Position I2C Compatible Digital Potentiometer

  • 22頁

  • AD

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AD5243/AD5248
THEORY OF OPERATION
The AD5243/AD5248 are 256-position digitally controlled
variable resistor (VR) devices.
An internal power-on preset places the wiper at midscale
during power-on, which simplifies the fault condition recovery
at power-up.
The general equation determining the digitally programmed
output resistance between W and B is
R
WB
(
D
)
=
D
脳
R
AB
+
2
脳
R
W
256
(1)
where:
D
is the decimal equivalent of the binary code loaded in the
8-bit RDAC register.
R
AB
is the end-to-end resistance.
R
W
is the wiper resistance contributed by the on resistance of
the internal switch.
In summary, if R
AB
= 10 k鈩?and the A terminal is open
circuited, the following output resistance R
WB
is set for the
indicated RDAC latch codes.
Table 7. Codes and Corresponding R
WB
Resistance
D (Dec)
255
128
1
0
R
WB
(鈩?
9,961
5,060
139
100
Output State
Full scale (R
AB
鈭?1 LSB + R
W
)
Midscale
1 LSB
Zero scale (wiper contact resistance)
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation
The nominal resistance of the RDAC between Terminals A and
B is available in 2.5 k鈩? 10 k鈩? 50 k鈩? and 100 k鈩? The nominal
resistance (R
AB
) of the VR has 256 contact points accessed by
the wiper terminal, plus the B terminal contact. The 8-bit data
in the RDAC latch is decoded to select one of the 256 possible
settings.
A
W
A
W
A
W
04109-0-012
B
B
B
Figure 36. Rheostat Mode Configuration
Assuming that a 10 k鈩?part is used, the wiper鈥檚 first connection
starts at the B terminal for data 0x00. Because there is a 50 鈩?/div>
wiper contact resistance, such a connection yields a minimum
of 100 鈩?(2 脳 50 鈩? resistance between Terminals W and B. The
second connection is the first tap point, which corresponds to
139 鈩?(R
WB
= R
AB
/256 + 2 脳 R
W
= 39 鈩?+ 2 脳 50 鈩? for data
0x01. The third connection is the next tap point, representing
178 鈩?(2 脳 39 鈩?+ 2 脳 50 鈩? for data 0x02, and so on. Each LSB
data value increase moves the wiper up the resistor ladder until
the last tap point is reached at 10,100 鈩?(R
AB
+ 2 脳 R
W
).
A
R
S
Note that, in the zero-scale condition, a finite wiper resistance
of 100 鈩?is present. Care should be taken to limit the current
flow between W and B in this state to a maximum pulse current
of no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the Wiper W and Terminal A also produces a
digitally controlled complementary resistance, R
WA
. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for R
WA
starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
R
WA
(
D
)
=
256
鈭?/div>
D
脳
R
AB
+
2
脳
R
W
256
D7
D6
D5
D4
D3
D2
D1
D0
R
S
(2)
R
S
W
For R
AB
= 10 k鈩?and the B terminal open circuited, the
following output resistance R
WA
is set for the indicated RDAC
latch codes.
Table 8. Codes and Corresponding R
WA
Resistance
D (Dec)
255
128
1
0
R
WA
(鈩?
139
5,060
9,961
10,060
Output State
Full scale
Midscale
1 LSB
Zero scale
RDAC
LATCH
AND
DECODER
R
S
B
04109-0-013
Figure 37. AD5243 Equivalent RDAC Circuit
Rev. 0 | Page 13 of 20

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AD5248

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