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AD5378

DATA DECODING

The AD5378 contains a 14-bit data bus, DB13 to DB0. Depend-

ing on the value of REG1 and REG0, this data is loaded into the

addressed DAC input register(s), offset (c) register(s), gain (m)

register(s), or the special function register.

Table 13. DAC Data Format (REG1 = 1, REG0 = 1)

DB13 to DB0

11 1111 1111 1111

11 1111 1111 1110

10 0000 0000 0001

10 0000 0000 0000

01 1111 1111 1111

00 0000 0000 0001

00 0000 0000 0000

DAC Output

(16383/16384) V

REF

(+) V

(16382/16384) V

REF

(+) V

(8193/16384) V

REF

(+) V

(8192/16384) V

REF

(+) V

(8191/16384) V

REF

(+) V

(1/16384) V

REF

(+) V

0V

Table 15. Gain Data Format (REG1 = 0, REG0 = 1)

DB12 to DB1

1 1111 1111 1111

1 1111 1111 1110

1 0000 0000 0001

1 0000 0000 0000

0 1111 1111 1111

0 0000 0000 0001

0 0000 0000 0000

Gain

8192/8192

8191/8192

4098/8192

4097/8192

4096/8192

2/8192

1/8192

Table 16. Special Function Data Format (REG1 = 0, REG0 = 0)

DB13 to DB0

00000 10 1111111

00000 10 0000111

00000 10 0000001

00000 X0 0000000

00000 00 0000001

00000 00 0000111

00000 00 1111111

Increment/Decrement Step (LSB)

+127

+7

+1

0

鈭?

鈭?

鈭?28

Table 14. Offset Data Format (REG1 = 1, REG0 = 0)

DB13 to DB0

11 1111 1111 1111

11 1111 1111 1110

10 0000 0000 0001

10 0000 0000 0000

01 1111 1111 1111

00 0000 0000 0001

00 0000 0000 0000

Offset (LSB)

+8191

+8190

+1

+0

鈭?

鈭?191

鈭?192

Table 17. Soft Reset (REG1 = 0, REG0 = 0)

DB13 to DB0

11 1111 1111 1111

DAC Output

REFGND

Rev. PrA | Page 24 of 28

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