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ADG734 Datasheet

  • ADG734

  • CMOS, 2.5Ω Low Voltage,Triple/Quad SPDT Switches

  • 499.85KB

  • 13頁

  • AD

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ADG733/ADG734鈥揝PECIFICATIONS
DUAL SUPPLY
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match between
Channels (鈭哛
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Channel ON Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
ADG733 t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection
Off Isolation
1
(V
DD
= +3 V
10%, V
SS
= 鈥? V
10%, GND = 0 V, unless otherwise noted.)
B Version
鈥?0 C
25 C
to +85 C
V
SS
to V
DD
2.5
4.5
5.0
0.1
0.4
1.2
鹵
0.01
鹵
0.1
鹵
0.01
鹵
0.1
Unit
V
鈩?/div>
typ
鈩?/div>
max
鈩?/div>
typ
鈩?/div>
max
鈩?/div>
typ
鈩?/div>
max
nA typ
nA max
nA typ
nA max
V min
V max
碌A
typ
碌A
max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
dB typ
dB typ
MHz typ
pF typ
pF typ
碌A
typ
碌A
max
碌A
typ
碌A
max
Test Conditions/Comments
V
S
= V
SS
to V
DD
, I
DS
= 10 mA;
Test Circuit 1
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
V
DD
= +3.3 V, V
SS
= 鈥?.3 V
V
S
= +2.25 V/鈥?.25 V, V
D
= 鈥?.25 V/+2.25 V;
Test Circuit 2
V
S
= V
D
= +2.25 V/鈥?.25 V, Test Circuit 3
0.5
鹵
0.3
鹵
0.5
2.0
0.4
0.005
鹵
0.1
4
21
35
10
16
21
40
10
16
13
1
鹵
5
鈥?2
鈥?2
鈥?2
鈥?2
200
11
34
0.001
1.0
0.001
1.0
V
IN
= V
INL
or V
INH
Channel-to-Channel Crosstalk
鈥? dB Bandwidth
C
S
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
I
SS
R
L
= 300
鈩?
C
L
= 35 pF;
V
S
= 1.5 V, Test Circuit 4
R
L
= 300
鈩?
C
L
= 35 pF;
V
S
= 1.5 V, Test Circuit 4
R
L
= 300
鈩?
C
L
= 35 pF;
V
S
= 1.5 V, Test Circuit 5
R
L
= 300
鈩?
C
L
= 35 pF;
V
S
= 1.5 V, Test Circuit 5
R
L
= 300
鈩?
C
L
= 35 pF;
V
S
= 1.5 V, Test Circuit 6
V
S
= 0 V, R
S
= 0
鈩?
C
L
= 1 nF;
Test Circuit 7
R
L
= 50
鈩?
C
L
= 5 pF, f = 10 MHz;
R
L
= 50
鈩?
C
L
= 5 pF, f = 1 MHz;
Test Circuit 8
R
L
= 50
鈩?
C
L
= 5 pF, f = 10 MHz;
R
L
= 50
鈩?
C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
R
L
= 50
鈩?
C
L
= 5 pF, Test Circuit 8
V
DD
= 3.3 V
Digital Inputs = 0 V or 3.3 V
V
SS
= 鈥?.3 V
Digital Inputs = 0 V or 3.3 V
NOTES
1
Temperature range is as follows: B Version: 鈥?0擄C to +85擄C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
鈥?鈥?/div>
REV. 0

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