AD7142
Table 29. STAGE_COMPLETE_LIMIT_INT Register
7
Address
0x00A
Data Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[15:13]
7
Default
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
Type
R
Name
STAGE0_COMPLETE_STATUS_INT
STAGE1_COMPLETE_STATUS_INT
STAGE2_COMPLETE_STATUS_INT
STAGE3_COMPLETE_STATUS_INT
STAGE4_COMPLETE_STATUS_INT
STAGE5_COMPLETE_STATUS_INT
STAGE6_COMPLETE_STATUS_INT
STAGE7_COMPLETE_STATUS_INT
STAGE8_COMPLETE_STATUS_INT
STAGE9_COMPLETE_STATUS_INT
STAGE10_COMPLETE_STATUS_INT
STAGE11_COMPLETE_STATUS_INT
GPIO_STATUS
Unused
Description
STAGE0 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE1 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE2 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE3 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE4 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE5 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE6 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE7 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE8 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE9 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE10 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
STAGE11 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
GPIO input pin status
1 = indicates level on GPIO pin has changed
Set unused register bits = 0
Registers self-clear to 0 after readback, provided that the limits are not exceeded.
Table 30. CDC 16-Bit Conversion Data Registers
Address
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012
0x013
0x014
0x015
0x016
Data Bit
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
[15:0]
Default
Value
0
0
0
0
0
0
0
0
0
0
0
0
Type
R
R
R
R
R
R
R
R
R
R
R
R
Name
ADC_RESULT_S0
ADC_RESULT_S1
ADC_RESULT_S2
ADC_RESULT_S3
ADC_RESULT_S4
ADC_RESULT_S5
ADC_RESULT_S6
ADC_RESULT_S7
ADC_RESULT_S8
ADC_RESULT_S9
ADC_RESULT_S10
ADC_RESULT_S11
Description
STAGE0 CDC 16-bit conversion data
STAGE1 CDC 16-bit conversion data
STAGE2 CDC 16-bit conversion data
STAGE3 CDC 16-bit conversion data
STAGE4 CDC 16-bit conversion data
STAGE5 CDC 16-bit conversion data
STAGE6 CDC 16-bit conversion data
STAGE7 CDC 16-bit conversion data
STAGE8 CDC 16-bit conversion data
STAGE9 CDC 16-bit conversion data
STAGE10 CDC 16-bit conversion data
STAGE11 CDC 16-bit conversion data
Rev. 0 | Page 46 of 68