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CS8416 Datasheet

  • CS8416

  • 192 kHz Digital Audio Interface Receiver

  • 63頁

  • CIRRUS

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CS8416
DTS_CD 鈥?DTS_CD data was detected
Reserved 鈥?This bit may change state depending on the input audio data.
DGTL_SIL 鈥?Digital Silence was detected: at least 2047 consecutive constant samples of the same 24-bit
audio data on both channels.
96KHZ 鈥?if input sample rate is
鈮?/div>
48 KHz, outputs a 鈥?鈥? Outputs a 鈥?鈥?if the sample rate is
鈮?/div>
88.1 KHz.
Otherwise output indeterminate.
8.12
7
0
Receiver Error (0Ch)
6
QCRC
5
CCRC
4
UNLOCK
3
V
2
CONF
1
BIP
0
PAR
This register contains the AES3 receiver and PLL status bits. Unmasked bits will go high on occur-
rence of the error, and will stay high until the register is read. Reading the register resets all bits to 0,
unless the error source is still true. Bits that are masked off in the receiver error mask register will
always be 0 in this register.
QCRC - Q-subcode data CRC error indicator. Updated on Q-subcode block boundaries
0 - No error
1 - Error
CCRC - Channel Status Block Cyclic Redundancy Check bit. Updated on CS block boundaries,
valid in Pro mode
0 - No error
1 - Error
UNLOCK - PLL lock status bit. Updated on CS block boundaries.
0 - PLL locked
1 - PLL out of lock
V - Received AES3 Validity bit status. Updated on sub-frame boundaries.
0 - Data is valid and is normally linear coded PCM audio
1 - Data is invalid, or may be valid compressed audio
CONF - Confidence bit. Updated on sub-frame boundaries.
0 - No error
1 - Confidence error. This indicates that the received data eye opening is less than half a bit period,
indicating a poor link that is not meeting specifications.
BIP - Bi-phase error bit. Updated on sub-frame boundaries.
0 - No error
1 - Bi-phase error. This indicates an error in the received bi-phase coding.
PAR - Parity bit. Updated on sub-frame boundaries.
0 - No error
1 - Parity error
DS578PP2
31

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