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CS8406 Datasheet

  • CS8406

  • 192 kHz Digital Audio Interface Transmitter

  • 40頁

  • CIRRUS

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CS8406
8.13
7
0
User Data Buffer Control (13h)
6
0
5
0
4
UD
3
UBM1
2
UBM0
1
0
0
EFTUI
UD - User bit data source specifier
Default = 鈥?鈥?/div>
0 - U Pin is the source of transmitted U data
1 - U data buffer is the source of transmitted U data
UBM1:0 - Sets the operating mode of the AES3 User bit manager
Default = 鈥?0鈥?/div>
00 - Transmit all zeros mode
01 - Block mode
10 - Reserved
11 - Reserved
EFTUI - E to F U-data buffer transfer inhibit bit (valid in block mode only).
Default = 鈥?鈥?/div>
0 - Allow U-data E to F buffer transfers
1 - Inhibit U-data E to F buffer transfers
8.14
Channel Status bit or User bit Data Buffer (20h - 37h)
Either the channel status data buffer E or the separate user bit data buffer E (provided UBM bits are set to block
mode) is accessible through these register addresses.
8.15
7
CS8406 I.D. and Version Register (7Fh) (Read Only)
6
ID2
5
ID1
4
ID0
3
VER3
2
VER2
1
VER1
0
VER0
ID3
ID[3:0] - ID code for the CS8406. Permanently set to 1110
VER[3:0] = 0001 (revision A)
VER[3:0] = 0010 (revision B)
DS580F1
29

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