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CA3240EZ Datasheet

  • CA3240EZ

  • Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/...

  • 106.00KB

  • 15頁

  • INTERSIL   INTERSIL

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CA3240, CA3240A
Typical Performance Curves
R
L
=
鈭?/div>
INPUT AND OUTPUT VOLTAGE
REFERENCED TO TERMINAL V+(V)
INPUT AND OUTPUT VOLTAGE
REFERENCED TO TERMINAL V- (V)
0
-0.5
-1
-1.5
-2
-2.5
-3
T
A
= 25
o
C
0
5
T
A
= -40
o
C
T
A
= 85
o
C
OUTPUT VOLTAGE (+V
O
)
COMMON MODE VOLTAGE (+V
ICR
)
T
A
= 25
o
C
T
A
= 85
o
C
1.5
1.0
0.5
T
A
= -40
o
C TO 85
o
C
0
-0.5
-1.0
-1.5
T
A
= 85
o
C
T
A
= -40
o
C
OUTPUT VOLTAGE (-V
O
)
COMMON MODE VOLTAGE (-V
ICR
)
(Continued)
R
L
=
鈭?/div>
T
A
= 25
o
C
T
A
= -40
o
C
20
25
10
15
SUPPLY VOLTAGE (V)
0
5
10
15
20
25
SUPPLY VOLTAGE (V)
FIGURE 24A.
FIGURE 24B.
FIGURE 24. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
SUPPLY VOLTAGE: V
S
=
鹵15V
T
A
= 25
o
C, R
L
= 2k鈩? C
L
= 100pF
10
INPUT VOLTAGE (V)
8
6
4
2
0
-2
-4
-6
-8
-10
0.1
2
4
+15V
1mV
1mV
0.1碌F
+
10k鈩?/div>
CA3240
SIMULATED
LOAD
2k鈩?/div>
10mV
10mV
-
FOLLOWER
INVERTING
-15V
1mV
10mV
6
8
100pF
0.1碌F
1mV
2k鈩?/div>
0.05碌F
10
10mV
1.0
TIME (碌s)
2
4
6
8
FIGURE 25A. SETTLING TIME vs INPUT VOLTAGE
5k鈩?/div>
+15V
5k鈩?/div>
0.1碌F
FIGURE 25B. TEST CIRCUIT (FOLLOWER)
-
CA3240
200鈩?/div>
SIMULATED
LOAD
2k鈩?/div>
+
100pF
0.1碌F
4.99k鈩?/div>
-15V
5.11k鈩?/div>
D
1
1N914
SETTLING POINT
D
2
1N914
FIGURE 25C. TEST CIRCUIT (INVERTING)
FIGURE 25. INPUT VOLTAGE vs SETTLING TIME
14
FN1050.6
March 4, 2005

CA3240EZ 產(chǎn)品屬性

  • 50

  • 集成電路 (IC)

  • Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps

  • -

  • 通用

  • 2

  • -

  • 9 V/µs

  • 4.5MHz

  • -

  • 10pA

  • 5000µV

  • 8mA

  • 40mA

  • 4 V ~ 36 V，±2 V ~ 18 V

  • -40°C ~ 85°C

  • 通孔

  • 8-DIP（0.300"，7.62mm）

  • 8-PDIP

  • 管件

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