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ISL6552CB Datasheet

  • ISL6552CB

  • Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM C...

  • 496.00KB

  • 18頁

  • INTERSIL   INTERSIL

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ISL6552
R
IN
FB
V
IN
ISL6552
ERROR
AMPLIFIER
CORRECTION
-
+
+
鈭?/div>
-
PROGRAMMABLE
REFERENCE
DAC
-
I AVERAGE
CURRENT
AVERAGING
ISEN2
R
ISEN2
V
IN
PHASE
-
+
鈭?/div>
COMPARATOR
+
-
PWM
CIRCUIT
PWM2
HIP6601
I
L2
Q4
Q3
L2
V
CORE
C
OUT
鈭?/div>
+
CURRENT
SENSING
R
LOAD
COMPARATOR
-
+
PWM
CIRCUIT
PWM1
HIP6601
I
L1
Q2
PHASE
+
鈭?/div>
CURRENT
SENSING
ISEN1
R
ISEN1
Q1
L1
-
CORRECTION
FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6552 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO POWER
CHANNEL REGULATOR
Operation
Figure 1 shows a simplified diagram of the voltage regulation
and current control loops. Both voltage and current feedback
are used to precisely regulate voltage and tightly control
output currents, I
L1
and I
L2
, of the two power channels. The
voltage loop comprises the error amplifier, comparators,
gate drivers and output MOSFETs. The error amplifier is
essentially connected as a voltage follower that has as an
input, the programmable reference DAC and an output that
is the CORE voltage.
This increased duty cycle signal is passed through the PWM
circuit with no phase reversal and on to the HIP6601, again
with no phase reversal for gate drive to the upper MOSFETs,
Q1 and Q3. Increased duty cycle or ON time for the
MOSFET transistors results in increased output voltage to
compensate for the low output voltage sensed.
Current Loop
The current control loop works in a similar fashion to the
voltage control loop, but with current control information
applied individually to each channel鈥檚 comparator. The
information used for this control is the voltage that is
developed across r
DS(ON)
of each lower MOSFET, Q2 and
Q4, when they are conducting. A single resistor converts
and scales the voltage across the MOSFETs to a current
that is applied to the current sensing circuit within the
ISL6552. Output from these sensing circuits is applied to the
current averaging circuit. Each PWM channel receives the
difference current signal from the summing circuit that
compares the average sensed current to the individual
channel current. When a power channel鈥檚 current is greater
than the average current, the signal applied via the summing
correction circuit to the comparator, reduces the output pulse
Voltage Loop
Feedback from the CORE voltage is applied via resistor R
IN
to the inverting input of the error amplifier. This signal can
drive the error amplifier output either high or low, depending
upon the CORE voltage. Low CORE voltage makes the
amplifier output move towards a higher output voltage level.
Amplifier output voltage is applied to the positive inputs of
the comparators via the correction summing networks.
Out-of-phase sawtooth signals are applied to the two
comparators inverting inputs. Increasing error amplifier
voltage results in increased comparator output duty cycle.
8

ISL6552CB PDF文件相關(guān)型號(hào)

ISL6552CBZ,ISL6552CR,ISL6552CRZ,ISL6553CBZ,ISL6554

ISL6552CB 產(chǎn)品屬性

  • 38

  • 集成電路 (IC)

  • PMIC - 穩(wěn)壓器 - DC DC 切換控制器

  • -

  • 控制器

  • 1

  • 1.5MHz

  • -

  • 4.75 V ~ 5.25 V

  • 是

  • 無

  • 無

  • 無

  • 無

  • 無

  • 無

  • 無

  • 0°C ~ 70°C

  • 20-SOIC（0.295"，7.50mm 寬）

  • 管件

ISL6552CB相關(guān)型號(hào)PDF文件下載

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