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IS42S16160B Datasheet

  • IS42S16160B

  • 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM

  • 62頁(yè)

  • ISSI   ISSI

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IS42S83200B,
IS42S16160B
PRECHARGE
The PRECHARGE command (see figure) is used to deac-
tivate the open row in a particular bank or the open row in all
banks. The bank(s) will be available for a subsequent row
access some specified time (t
RP
) after the PRECHARGE
command is issued. Input A10 determines whether one or
all banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA0, BA1 select the
bank. When all banks are to be precharged, inputs BA0,
BA1 are treated as 鈥淒on鈥檛 Care.鈥?Once a bank has been
precharged, it is in the idle state and must be activated prior
to any READ or WRITE commands being issued to that
bank.
PRECHARGE Command
CLK
HIGH
CKE
CS
RAS
CAS
WE
A0-A9, A11, A12
ALL BANKS
POWER-DOWN
Power-down occurs if CKE is registered LOW coincident
with a NOP or COMMAND INHIBIT when no accesses are
in progress. If power-down occurs when all banks are idle,
this mode is referred to as precharge power-down; if power-
down occurs when there is a row active in either bank, this
mode is referred to as active power-down. Entering power-
down deactivates the input and output buffers, excluding
CKE, for maximum power savings while in standby. The
device may not remain in the power-down state longer than
the refresh period (64ms) since no refresh operations are
performed in this mode.
The power-down state is exited by registering a NOP or
COMMAND INHIBIT and CKE HIGH at the desired clock
edge (meeting t
CKS
). See figure below.
A10
BANK SELECT
BA0, BA1
BANK ADDRESS
POWER-DOWN
CLK
t
CKS
CKE
鈮?/div>
t
CKS
COMMAND
NOP
Input buffers gated off
NOP
ACTIVE
t
RCD
t
RAS
t
RC
DON'T CARE
All banks idle
Enter power-down mode
Exit power-down mode
less than 64ms
Integrated Silicon Solution, Inc. 鈥?www.issi.com
Rev. C
03/13/07
47

IS42S16160B相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠(chǎng)商
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  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM
    ISSI
  • 英文版
    256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM
    ISSI [Inte...
  • 英文版
    512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI [Inte...
  • 英文版
    128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI
  • 英文版
    128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI [Inte...
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI
  • 英文版
    512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI [Inte...
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    256 Mb Synchronous DRAM
    ISSI
  • 英文版
    32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
    ISSI
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI [Inte...
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ETC
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ETC [ETC]

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