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IS42S16160B Datasheet

  • IS42S16160B

  • 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM

  • 624.00KB

  • 62頁(yè)

  • ISSI   ISSI

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IS42S83200B,
IS42S16160B
REGISTER DEFINITION
Mode Register
The mode register is used to define the specific mode of
operation of the SDRAM. This definition includes the
selection of a burst length, a burst type, a CAS latency, an
operating mode and a write burst mode, as shown in MODE
REGISTER DEFINITION.
The mode register is programmed via the LOAD MODE
REGISTER command and will retain the stored information
until it is programmed again or the device loses power.
Mode register bits M0-M2 specify the burst length, M3
specifies the type of burst (sequential or interleaved), M4- M6
specify the CAS latency, M7 and M8 specify the operating
mode, M9 specifies the WRITE burst mode, and M10, M11,
and M12 are reserved for future use.
The mode register must be loaded when all banks are idle,
and the controller must wait the specified time before
initiating the subsequent operation. Violating either of these
requirements will result in unspecified operation.
MODE REGISTER DEFINITION
BA1 BA0 A12
A11
A10
(1)
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Address Bus (Ax)
Mode Register (Mx)
Reserved
Burst Length
M2
0
0
0
0
1
1
1
1
Burst Type
M3
0
1
Latency Mode
M6 M5 M4
0
0
0
0
1
1
1
1
Operating Mode
M8 M7
0 0
鈥?鈥?/div>
M6-M0
Defined
鈥?/div>
Mode
Standard Operation
All Other States Reserved
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CAS Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Type
Sequential
Interleaved
M1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
M3=0
1
2
4
8
Reserved
Reserved
Reserved
Full Page
M3=1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
Write Burst Mode
M9
0
1
Mode
Programmed Burst Length
Single Location Access
1. To ensure compatibility with future devices,
should program BA1, BA0, A12, A11, A10 = "0"
24
Integrated Silicon Solution, Inc. 鈥?www.issi.com
Rev. C
03/13/07

IS42S16160B相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
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  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLT...
    ETC [ETC]
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM
    ISSI
  • 英文版
    256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM
    ISSI [Inte...
  • 英文版
    512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI [Inte...
  • 英文版
    128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI
  • 英文版
    128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI [Inte...
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI
  • 英文版
    512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC ...
    ISSI [Inte...
  • 英文版
    2(1)M words x 8(16) bits x 4 banks (64-mbit) synchronous dyn...
    ICSI [Inte...
  • 英文版
    256 Mb Synchronous DRAM
    ISSI
  • 英文版
    32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
    ISSI
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ISSI [Inte...
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ETC
  • 英文版
    1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC...
    ETC [ETC]

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