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CD74HC4059 Datasheet

  • CD74HC4059

  • High Speed CMOS Logic CMOS Programmable Divide-by-N Counter

  • 288.00KB

  • 12頁

  • TI

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CD74HC4059
How to Preset the CD74HC/HCT4059 to Desired
梅N
The value N is determined as follows:
(EQ. 1)
N = (MODE鈥? (1000 x Decade 5 Preset + 100 x Decade 4
Preset + 10 x Decade 3 Preset + 1 x Decade 2 Preset) +
Decade 1 Preset
鈥?/div>
MODE = First counting section divider (10, 8, 5, 4 or 2)
N
Preset Value = Mode
Example:
N = 8479, Mode = 5
(EQ. 2)
To calculate preset values for any N count, divide the N
count by the Mode. The resultant is the corresponding
preset values of the 5th through 2nd decade with the
remainder being equal to the 1st decade value.
Mode Select = 5
K
a
K
b
K
c
H L H
1695 + 4 (Preset Values)
5 | 8479
N
Mode
Program Jam Inputs (BCD)
4
J1
L
J2 J3
L
H
1
J4
H
5
J5 J6 J7
H
L
H
J8
L
J9 J10
H
L
9
J11
L
J12
H
J13
L
J14
H
6
J15
H
J16
L
NOTE:
To verify the results, use Equation 1:
N = 5 (1000 x 1 + 100 x 6 + 10 x 9 + 1 x 5) + 4
N = 8479
PROGRAM JAM INPUTS (BCD)
J1
3
J2 J3
4
5
J4
6
J5
J6
J7
20
J8
19
J9 J10 J11 J12
18
17
16
15
J13 J14 J15 J16
10
9
8
7
P.E.
PRESETTABLE LOGIC
24
V
CC
12
GND
22
21
CLOCK
INPUT
1
FIRST
COUNTING
SECTION
梅10,
8, 5, 4, 2
INTERMEDIATE COUNTING SECTION
梅10
梅10
梅10
LAST
COUNTING
SECTION
梅1,
2, 2, 4, 8
RECOGNITION
GATING
14
K
a
MODE
SELECT
INPUTS
13
K
b
11
K
c
23
2
LATCH
ENABLE
OUTPUT
STAGE
DIVIDE-BY-N
OUTPUT
MODE
CONTROL
PRESET
ENABLE
FIGURE 1. FUNCTIONAL BLOCK DIAGRAM
3

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