最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 1754.00KB

  • 134頁(yè)

  • TI

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

www.ti.com
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
4.9
Serial Peripheral Interface (SPI) Modules (SPI-A, SPI-B, SPI-C, SPI-D)
The 280x devices include the four-pin serial peripheral interface (SPI) module. Up to four SPI modules
(SPI-A, SPI-B, SPI-C, and SPI-D) are available. The SPI is a high-speed, synchronous serial I/O port that
allows a serial bit stream of programmed length (one to sixteen bits) to be shifted into and out of the
device at a programmable bit-transfer rate. Normally, the SPI is used for communications between the
DSP controller and external peripherals or another processor. Typical applications include external I/O or
peripheral expansion through devices such as shift registers, display drivers, and ADCs. Multidevice
communications are supported by the master/slave operation of the SPI.
The SPI module features include:
鈥?/div>
Four external pins:
鈥?SPISOMI: SPI slave-output/master-input pin
鈥?SPISIMO: SPI slave-input/master-output pin
鈥?SPISTE: SPI slave transmit-enable pin
鈥?SPICLK: SPI serial-clock pin
NOTE: All four pins can be used as GPIO, if the SPI module is not used.
鈥?/div>
Two operational modes: master and slave
Baud rate: 125 different programmable rates.
Baud rate =
Baud rate =
LSPCLK
(SPIBRR
)
1)
LSPCLK
4
when SPIBRR = 3 to 127
when SPIBRR = 0,1, 2
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Data word length: one to sixteen data bits
Four clocking schemes (controlled by clock polarity and clock phase bits) include:
鈥?Falling edge without phase delay: SPICLK active-high. SPI transmits data on the falling edge of the
SPICLK signal and receives data on the rising edge of the SPICLK signal.
鈥?Falling edge with phase delay: SPICLK active-high. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the falling edge of the SPICLK signal.
鈥?Rising edge without phase delay: SPICLK inactive-low. SPI transmits data on the rising edge of the
SPICLK signal and receives data on the falling edge of the SPICLK signal.
鈥?Rising edge with phase delay: SPICLK inactive-low. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the rising edge of the SPICLK signal.
Simultaneous receive and transmit operation (transmit function can be disabled in software)
Transmitter and receiver operations are accomplished through either interrupt-driven or polled
algorithms.
Nine SPI module control registers: Located in control register frame beginning at address 7040h.
NOTE
All registers in this module are 16-bit registers that are connected to Peripheral Frame 2.
When a register is accessed, the register data is in the lower byte (7-0), and the upper
byte (15-8) is read as zeros. Writing to the upper byte has no effect.
Enhanced feature:
鈥?/div>
16-level transmit/receive FIFO
鈥?/div>
Delayed transmit control
The SPI port operation is configured and controlled by the registers listed in
Table 4-10.
Peripherals
73

TMS320C2801相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
    TI
  • 英文版
    SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
    TI [Texas ...
  • 英文版
    GRAPHICS SYSTEM PROCESSOR
    TI
  • 英文版
    Graphics Library
  • 英文版
    C Source Debugger User Guide
  • 英文版
    RADIO FREQUENCY I DENTIFICATION SYSTEMS
    TI
  • 英文版
    Family Simulator Getting Started Guide
  • 英文版
    Programming Tool Getting Started Guide
  • 英文版
    Microcontroller Family User抯 Guide
  • 英文版
    C Source Debugger User Guide
  • 英文版
    Microcontroller/Gang Programmer
  • 英文版
    DUAL 25-BIT STATIC SHIFT REGISTER
    TI [Texas ...
  • 英文版
    DUAL 25-BIT STATIC SHIFT REGISTER
    TI [Texas ...
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！