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TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 1754.00KB

  • 134頁

  • TI

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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
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TMS320C2802, TMS320C2801 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT
...........
92
Typical Current Consumption by Various Peripherals (at 100 MHz)
.......................................................
93
TMS320x280x Clock Table and Nomenclature (100-MHz Devices)
.......................................................
96
TMS320x280x Clock Table and Nomenclature (60-MHz Devices)
.........................................................
97
...........................................................................................................
98
XCLKIN Timing Requirements - PLL Enabled
................................................................................
98
XCLKIN Timing Requirements - PLL Disabled
................................................................................
98
XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)
.........................................................
98
Power Management and Supervisory Circuit Solutions
......................................................................
99
Reset (XRS) Timing Requirements
...........................................................................................
101
General-Purpose Output Switching Characteristics
.........................................................................
102
General-Purpose Input Timing Requirements
...............................................................................
103
IDLE Mode Timing Requirements
.............................................................................................
105
IDLE Mode Switching Characteristics
.........................................................................................
105
STANDBY Mode Timing Requirements
......................................................................................
105
STANDBY Mode Switching Characteristics
.................................................................................
106
HALT Mode Timing Requirements
............................................................................................
106
HALT Mode Switching Characteristics
.......................................................................................
107
ePWM Timing Requirements
...................................................................................................
108
ePWM Switching Characteristics
..............................................................................................
108
Trip-Zone input Timing Requirements
........................................................................................
108
High Resolution PWM Characteristics at SYSCLKOUT = (60 - 100 MHz)
..............................................
109
Enhanced Capture (eCAP) Timing Requirement
............................................................................
109
eCAP Switching Characteristics
...............................................................................................
109
Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements
....................................................
109
eQEP Switching Characteristics
...............................................................................................
109
External ADC Start-of-Conversion Switching Characteristics
..............................................................
110
External Interrupt Timing Requirements
......................................................................................
110
External Interrupt Switching Characteristics
.................................................................................
110
I
2
C Timing
........................................................................................................................
111
SPI Master Mode External Timing (Clock Phase = 0)
......................................................................
112
SPI Master Mode External Timing (Clock Phase = 1)
......................................................................
114
SPI Slave Mode External Timing (Clock Phase = 0)
........................................................................
115
SPI Slave Mode External Timing (Clock Phase = 1)
........................................................................
116
ADC Electrical Characteristics (over recommended operating conditions)
..............................................
118
ADC Power-Up Delays
..........................................................................................................
119
Current Consumption for Different ADC Configurations (at 12.5-MHz ADCCLK)
.......................................
119
Sequential Sampling Mode Timing
............................................................................................
121
Simultaneous Sampling Mode Timing
........................................................................................
122
Flash Endurance
.................................................................................................................
124
Flash Parameters at 100-MHz SYSCLKOUT
................................................................................
124
Input Clock Frequency
List of Tables
7

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