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TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 134頁

  • TI

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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
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Typical Operational Power Versus Frequency (F2808)
......................................................................
94
3.3-V Test Load Circuit
...........................................................................................................
96
Clock Timing
.......................................................................................................................
99
Power-on Reset
..................................................................................................................
100
Warm Reset
......................................................................................................................
101
Example of Effect of Writing Into PLLCR Register
..........................................................................
102
General-Purpose Output Timing
...............................................................................................
102
Sampling Mode
..................................................................................................................
103
General-Purpose Input Timing
.................................................................................................
104
....................................................................................................
STANDBY Entry and Exit Timing Diagram
...................................................................................
HALT Wake-Up Using GPIOn
.................................................................................................
PWM Hi-Z Characteristics
......................................................................................................
ADCSOCAO or ADCSOCBO Timing
.........................................................................................
External Interrupt Timing
.......................................................................................................
SPI Master Mode External Timing (Clock Phase = 0)
......................................................................
SPI Master Mode External Timing (Clock Phase = 1)
......................................................................
SPI Slave Mode External Timing (Clock Phase = 0)
........................................................................
SPI Slave Mode External Timing (Clock Phase = 1)
........................................................................
ADC Power-Up Control Bit Timing
............................................................................................
ADC Analog Input Impedance Model
.........................................................................................
Sequential Sampling Mode (Single-Channel) Timing
.......................................................................
Simultaneous Sampling Mode Timing
........................................................................................
IDLE Entry and Exit Timing
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110
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122
List of Figures
5

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