最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 134頁

  • TI

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
www.ti.com
The PLL, clocking, watchdog and low-power modes, are controlled by the registers listed in
Table 3-14.
Table 3-14. PLL, Clocking, Watchdog, and Low-Power Mode Registers
(1)
NAME
XCLK
PLLSTS
reserved
HISPCP
LOSPCP
PCLKCR0
PCLKCR1
LPMCR0
reserved
PLLCR
SCSR
WDCNTR
reserved
WDKEY
reserved
WDCR
reserved
(1)
ADDRESS
0x7010
0x7011
0x7012 - 0x7019
0x701A
0x701B
0x701C
0x701D
0x701E
0x701F - 0x7020
0x7021
0x7022
0x7023
0x7024
0x7025
0x7026 - 0x7028
0x7029
0x702A - 0x702F
SIZE (x16)
1
1
8
1
1
1
1
1
1
1
1
1
1
1
3
1
6
Watchdog Control Register
Watchdog Reset Key Register
PLL Control Register
System Control and Status Register
Watchdog Counter Register
High-Speed Peripheral Clock Prescaler Register (for HSPCLK)
Low-Speed Peripheral Clock Prescaler Register (for LSPCLK)
Peripheral Clock Control Register 0
Peripheral Clock Control Register 1
Low Power Mode Control Register 0
PLL Status Register
DESCRIPTION
XCLKOUT Pin Control, X1 and XCLKIN Status Register
All of the registers in this table are EALLOW protected.
3.6.1
OSC and PLL Block
Figure 3-10
shows the OSC and PLL block on the 280x.
XCLKIN
(3.3-V clock input)
OSCCLK
xor
PLLSTS[OSCOFF]
PLL
OSCCLK
0
OSCCLK or
VCOCLK
CLKIN
/2
VCOCLK
n
n
鈮?/div>
0
PLLSTS[PLLOFF]
X1
On chip
oscillator
X2
4-bit PLL Select (PLLCR)
PLLSTS[CLKINDIV]
Figure 3-10. OSC and PLL Block Diagram
The on-chip oscillator circuit enables a crystal/resonator to be attached to the 280x devices using the X1
and X2 pins. If the on-chip oscillator is not used, an external oscillator can be used in either one of the
following configurations:
1. A 3.3-V external oscillator can be directly connected to the XCLKIN pin. The X2 pin should be left
unconnected and the X1 pin tied low. The logic-high level in this case should not exceed V
DDIO
.
2. A 1.8-V external oscillator can be directly connected to the X1 pin. The X2 pin should be left
unconnected and the XCLKIN pin tied low. The logic-high level in this case should not exceed V
DD
.
The three possible input-clock configurations are shown in
Figure 3-11
through
Figure 3-13
46
Functional Overview

TMS320C2801相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
    TI
  • 英文版
    SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
    TI [Texas ...
  • 英文版
    GRAPHICS SYSTEM PROCESSOR
    TI
  • 英文版
    Graphics Library
  • 英文版
    C Source Debugger User Guide
  • 英文版
    RADIO FREQUENCY I DENTIFICATION SYSTEMS
    TI
  • 英文版
    Family Simulator Getting Started Guide
  • 英文版
    Programming Tool Getting Started Guide
  • 英文版
    Microcontroller Family User抯 Guide
  • 英文版
    C Source Debugger User Guide
  • 英文版
    Microcontroller/Gang Programmer
  • 英文版
    DUAL 25-BIT STATIC SHIFT REGISTER
    TI [Texas ...
  • 英文版
    DUAL 25-BIT STATIC SHIFT REGISTER
    TI [Texas ...
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI [Texas ...
  • 英文版
    HEX 32-BIT STATIC SHIFT REGISTERS
    TI

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！