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TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 134頁(yè)

  • TI

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Block Start
Address
0x00 0000
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
Data Space
Prog Space
M0 SARAM (1 K y 16)
0x00 0400
0x00 0800
Low 64K [0000 鈭?FFFF]
(24x/240x equivalent data space)
0x00 0D00
0x00 0E00
0x00 6000
0x00 7000
0x00 8000
0x00 9000
0x00 A000
0x00 C000
0x3D 7800
0x3D 7C00
0x3E 8000
High 64K [3F0000 鈭?3FFFFF]
(24x/240x equivalent program space)
0x3F 7FF8
0x3F 8000
0x3F 9000
0x3F A000
0x3F C000
0x3F F000
0x3F FFC0
Reserved
A.
B.
C.
D.
Memory blocks are not to scale.
Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
Protected
means the order of Write followed by Read operations is preserved rather than the pipeline order.
Certain memory ranges are EALLOW protected against spurious writes after configuration.
Figure 3-3. F2808 Memory Map
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脡
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M1 SARAM (1 K y 16)
Peripheral Frame 0
PIE Vector 鈭?RAM
(256 x 16)
(Enabled if ENPIE = 1)
Peripheral Frame 1
(protected)
Peripheral Frame 2
(protected)
L0 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
L1 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
H0 SARAM (0-wait)
(8 k y 16, Dual Mapped)
OTP
(1 k y 16, Secure Zone)
FLASH
(64 k y 16, Secure Zone)
128-bit Password
L0 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
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H0 SARAM (0-wait)
(8 k y 16, Dual Mapped)
Boot ROM (4 k y 16)
Vectors (32 y 32)
(enabled if VMAP = 1, ENPIE = 0)
L1 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
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Functional Overview
27

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