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TMS320C2801 Datasheet

  • TMS320C2801

  • TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, UCD95...

  • 1754.00KB

  • 134頁

  • TI

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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230H 鈥?OCTOBER 2003 鈥?REVISED JUNE 2006
1
1.1
鈥?/div>
F280x, F2801x, C280x, UCD9501 DSPs
Features
鈥?Up to 6 HRPWM Outputs With 150 ps MEP
Resolution
鈥?Up to Four Capture Inputs
鈥?Up to Two Quadrature Encoder Interfaces
鈥?Up to Six 32-bit/Six 16-bit Timers
Serial Port Peripherals
鈥?Up to 4 SPI Modules
鈥?Up to 2 SCI (UART) Modules
鈥?Up to 2 CAN Modules
鈥?One Inter-Integrated-Circuit (I
2
C) Bus
12-Bit ADC, 16 Channels
鈥?2 x 8 Channel Input Multiplexer
鈥?Two Sample-and-Hold
鈥?Single/Simultaneous Conversions
鈥?Fast Conversion Rate:
80 ns - 12.5 MSPS (F2809 only)
160 ns - 6.25 MSPS (280x, 9501)
267 ns - 3.75 MSPS (F2801x)
鈥?Internal or External Reference
Up to 35 Individually Programmable,
Multiplexed GPIO Pins With Input Filtering
Advanced Emulation Features
鈥?Analysis and Breakpoint Functions
鈥?Real-Time Debug via Hardware
Development Support Includes
鈥?ANSI C/C++ Compiler/Assembler/Linker
鈥?Code Composer Studio鈩?IDE
鈥?DSP/BIOS鈩?/div>
鈥?Digital Motor Control and Digital Power
Software Libraries
Low-Power Modes and Power Savings
鈥?IDLE, STANDBY, HALT Modes Supported
鈥?Disable Individual Peripheral Clocks
Package Options
鈥?Thin Quad Flatpack (PZ)
鈥?MicroStar BGA鈩?(GGM, ZGM)
Temperature Options:
鈥?A: -40擄C to 85擄C (PZ, GGM, ZGM)
鈥?S: -40擄C to 125擄C (PZ, GGM, ZGM)
鈥?Q: -40擄C to 125擄C (PZ)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
(1)
High-Performance Static CMOS Technology
鈥?100 MHz (10-ns Cycle Time)
鈥?60 MHz (16.67-ns Cycle Time)
鈥?Low-Power (1.8-V Core, 3.3-V I/O) Design
JTAG Boundary Scan Support
(1)
High-Performance 32-Bit CPU (TMS320C28x)
鈥?16 x 16 and 32 x 32 MAC Operations
鈥?16 x 16 Dual MAC
鈥?Harvard Bus Architecture
鈥?Atomic Operations
鈥?Fast Interrupt Response and Processing
鈥?Unified Memory Programming Model
鈥?Code-Efficient (in C/C++ and Assembly)
On-Chip Memory
鈥?F2809: 128K X 16 Flash, 18K X 16 SARAM
F2808: 64K X 16 Flash, 18K X 16 SARAM
F2806: 32K X 16 Flash, 10K X 16 SARAM
F2802: 32K X 16 Flash, 6K X 16 SARAM
F2801: 16K X 16 Flash, 6K X 16 SARAM
9501: 16K X 16 Flash, 6K X 16 SARAM
F2801x: 16K X 16 Flash, 6K X 16 SARAM
鈥?1K x 16 OTP ROM (Flash Devices Only)
鈥?C2802: 32K X 16 ROM, 6K X 16 SARAM
C2801: 16K X 16 ROM, 6K X 16 SARAM
Boot ROM (4K x 16)
鈥?With Software Boot Modes (via SCI, SPI,
CAN, I
2
C, and Parallel I/O)
鈥?Standard Math Tables
Clock and System Control
鈥?Dynamic PLL Ratio Changes Supported
鈥?On-Chip Oscillator
鈥?Watchdog Timer Module
Any GPIO A Pin Can Be Connected to One of
the Three External Core Interrupts
Peripheral Interrupt Expansion (PIE) Block
That Supports All 43 Peripheral Interrupts
128-Bit Security Key/Lock
鈥?Protects Flash/OTP/L0/L1 Blocks
鈥?Prevents Firmware Reverse Engineering
Three 32-Bit CPU Timers
Enhanced Control Peripherals
鈥?Up to 16 PWM Outputs
IEEE Standard 1149.1-1990 Standard Test Access Port and
Boundary Scan Architecture
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
Code Composer Studio, DSP/BIOS, MicroStar BGA, TMS320C28x, C28x, TMS320C2000 are trademarks of Texas Instruments.
eZdsp is a trademark of Spectrum Digital.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2003鈥?006, Texas Instruments Incorporated

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