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ST72321AR6 Datasheet

  • ST72321AR6

  • 8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIM...

  • STMicroelectronics   STMicroelectronics

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ST72321
SERIAL PERIPHERAL INTERFACE
(Cont鈥檇)
10.5.3.1 Functional Description
A basic example of interconnections between a
single master and a single slave is illustrated in
Figure 54.
The MOSI pins are connected together and the
MISO pins are connected together. In this way
data is transferred serially between master and
slave (most significant bit first).
The communication is always initiated by the mas-
ter. When the master device transmits data to a
slave device via MOSI pin, the slave device re-
Figure 54. Single Master/ Single Slave Application
sponds by sending data to the master device via
the MISO pin. This implies full duplex communica-
tion with both data out and data in synchronized
with the same clock signal (which is provided by
the master device via the SCK pin).
To use a single data line, the MISO and MOSI pins
must be connected at each node ( in this case only
simplex communication is possible).
Four possible data/clock timing relationships may
be chosen (see
Figure 57)
but master and slave
must be programmed with the same timing mode.
MASTER
MSBit
LSBit
MISO
MISO
MSBit
SLAVE
LSBit
8-BIT SHIFT REGISTER
8-BIT SHIFT REGISTER
MOSI
MOSI
SPI
CLOCK
GENERATOR
SCK
SS
+5V
SCK
SS
Not used if SS is managed
by software
89/185

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