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ST72321AR6 Datasheet

  • ST72321AR6

  • 8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIM...

  • 2302.91KB

  • STMicroelectronics   STMicroelectronics

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ST72321
Pin n擄
TQFP64
TQFP44
Type
Pin Name
Level
Output
Input
Input
float
wpu
Port
ana
OD
50
51
52
36
37
38
PA5 (HS)
PA6 (HS)/SDAI
PA7 (HS)/SCLI
I/O C
T
I/O C
T
I/O C
T
HS
HS
HS
X
X
X
X
X
T
T
PP
int
Main
function
Output
(after
reset)
X
Port A5
Port A6
Port A7
Alternate function
I
2
C Data
1)
I
2
C Clock
1)
53
39
V
PP
/ ICCSEL
I
Must be tied low. In flash programming
mode, this pin acts as the programming
voltage input V
PP
. See
Section 12.9.2
for more details. High voltage must not
be applied to ROM devices
Top priority non maskable interrupt.
External voltage detector
X
Top level interrupt input pin
Digital Ground Voltage
Resonator oscillator inverter output
External clock input or Resonator oscil-
lator inverter input
Digital Main Supply Voltage
X
X
X
X
X
X
X
X
X
X
X
X
X
Port E0
Port E1
Port E2
Port E3
SCI Transmit Data Out
SCI Receive Data In
54
55
56
57
58
59
60
61
62
63
64
-
-
40
41
42
43
44
1
-
-
-
RESET
EVD
TLI
V
SS_2
OSC2
3)
OSC1
3)
V
DD_2
PE0/TDO
PE1/RDI
PE2
PE3
I/O C
T
I
S
I/O
I
S
I/O C
T
I/O C
T
I/O C
T
I/O C
T
C
T
Notes:
1. In the interrupt input column, 鈥渆iX鈥?defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. In the open drain output column, 鈥淭鈥?defines a true open drain I/O (P-Buffer and protection diode to V
DD
are not implemented). See See 鈥淚/O PORTS鈥?on page 46. and
Section 12.8 I/O PORT PIN CHARACTER-
ISTICS
for more details.
3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-
lator; see
Section 1 INTRODUCTION
and
Section 12.5 CLOCK AND TIMING CHARACTERISTICS
for
more details.
4. On the chip, each I/O port has 8 pads. Pads that are not bonded to external pins are in input pull-up con-
figuration after reset. The configuration of these pads must be kept at reset state to avoid added current
consumption.
12/185

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