ST7538
Figure 5. Data Reception
虜
Control Register read
虜
Data Reception Timing Diagram
T
CC
T
CC
T
DS
T
DH
BIT22
T
CR
T
B
CLR_T
T
DS
RXD
T
CR
T
DH
BIT23
REG_DATA
RxTx
D03IN1404
Figure 6. Data Reception
CLR_T
T
DS
RXD
T
DH
虜
Control Register write
T
CC
虜
Data Reception Timing Diagram
T
CC
T
B
T
CR
REG_DATA
T
CR
RxTx
T
S
TXD
T
H
BIT22
T
CR
T
CR
BIT23
D03IN1403
Figure 7. Data Transmission
虜
Control Register read
虜
Data Reception Timing Diagram
T
CC
CLR_T
T
B
RXD
BIT23
T
DS
T
DH
T
DS
T
DH
T
CC
BIT22
REG_DATA
T
CR
T
CR
T
CR
RxTx
T
S
TXD
D03IN1405
T
H
Figure 8. Data Transmission
虜
Control Register Write
虜
Data Reception Timing Diagram
T
CC
CLR_T
T
B
TXD
T
S
REG_DATA
T
CR
T
CR
RxTx
T
DS
RXD
D03IN1401
T
CC
T
S
T
H
BIT22
T
CR
BIT23
T
H
T
DH
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