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MAX4675 Datasheet

  • MAX4675

  • 3|? Single SPST Analog Switches

  • Maxim   Maxim

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3鈩?Single SPST Analog Switches
Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for all
CMOS devices. Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings can
cause permanent damage to the devices. Always
sequence V+ on first, then V-, followed by the logic
inputs, NO, NC, or COM. If proper power-supply
sequencing is not possible, add two small-signal diodes
(D1, D2) in series with the supply pins (Figure 1). Adding
diodes reduces the analog signal range to one diode
drop below V+ and one diode drop above V- but does
not affect the devices鈥?low switch resistance and low
leakage characteristics. Device operation is unchanged,
and the difference between V+ and V- should not
exceed 12V.
Power-supply bypassing improves noise margin and
prevents switching noise from propagating from the V+
supply to other components. A 0.1碌F capacitor connect-
ed from V+ to GND is adequate for most applications.
V+
MAX4675/MAX4676
V
g
V-
Figure 1. Overvoltage Protection Using External Blocking
Diodes
Timing Diagrams/Test Circuits
MAX4675
MAX4676
NO
OR NC
V+
V+
COM
R
L
300鈩?/div>
IN
LOGIC
INPUT
GND
V-
V-
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
R
L
V
OUT
= V
COM
R
L
+ R
ON
SWITCH
OUTPUT
0
t
ON
SWITCH
OUTPUT
V
OUT
C
L
35pF
V
OUT
0.9 x V
0UT
t
OFF
0.9 x V
OUT
LOGIC
INPUT
+3V
50%
0
50%
t r < 20ns
t f < 20ns
SWITCH
INPUT
(
)
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 2. Switching Time
V+
鈭哣
OUT
V
OUT
V
OUT
C
L
GND
IN
V-
V-
V
IN
= 3.0V
IN
OFF
ON
Q = (鈭哣
OUT
)(C
L
)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
IN
OFF
ON
OFF
MAX4675
MAX4676
R
GEN
NC
OR NO
V+
COM
V
GEN
Figure 3. Charge Injection
_______________________________________________________________________________________
7

MAX4675 PDF文件相關(guān)型號(hào)

MAX4675EUT-T,MAX4675-MAX4676,MAX4676,MAX4676EUT-T

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