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T48C862-R8 Datasheet

  • T48C862-R8

  • MCU

  • Atmel   Atmel

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T48C862-R8
Serial Interface Status and
Control Register (SISC)
Bit 3
Write
Read
MCL
---
Bit 2
RACK
TACK
Bit 1
SIM
ACT
Bit 0
IFN
SRDY
Reset value: 1111b
Reset value: xxxxb
Primary register address: "A"hex
MCL
Multi-Chip Link
activation
MCL = 1,multi-chip link disabled.
This bit has to be set to "0" during
transactions to/from the internal EEPROM
MCL = 0, connects SC and SD additionally to the internal multi-chip link pads
Receive ACKnowledge
status/control bit for MCL mode
RACK = 0, transmit acknowledge in next receive telegram
RACK = 1, transmit no acknowledge in last receive telegram
Transmit ACKnowledge
status/control bit for MCL mode
TACK = 0, acknowledge received in last transmit telegram
TACK = 1, no acknowledge received in last transmit telegram
Serial Interrupt Mask
SIM = 1, disable interrupts
SIM = 0, enable serial interrupt. An interrupt is generated.
Interrupt FuNction
IFN = 1, the serial interrupt is generated at the end of telegram
IFN = 0, the serial interrupt is generated when the SRDY goes low (i.e., buffer
becomes empty/full in transmit/receive mode)
Serial
interface buffer
ReaDY
status flag
SRDY = 1, in receive mode: receive buffer empty
in transmit mode: transmit buffer full
SRDY = 0, in receive mode: receive buffer full
in transmit mode: transmit buffer empty
Transmission
ACTive
status flag
ACT = 1, transmission is active, i.e., serial data transfer. Stop or start conditions
are currently in progress.
ACT = 0, transmission is inactive
RACK
TACK
SIM
IFN
SRDY
ACT
Serial Transmit Buffer (STB)
鈥?/div>
Byte Write
First write cycle
Second write cycle
Bit 3
Bit 7
Bit 2
Bit 6
Bit 1
Bit 5
Bit 0
Bit 4
Primary register address: "9"hex
Reset value: xxxxb
Reset value: xxxxb
T
he STB is the transmit buffer of the SSI. The SSI transfers the transmit buffer into the shift regi
s-
ter and star
ts shifting with
the
most significant bit.
Serial Receive Buffer (SRB)
鈥?/div>
Byte Read
First read cycle
Second read cycle
Bit 7
Bit 3
Bit 6
Bit 2
Bit 5
Bit 1
Bit 4
Bit 0
Primary register address: "9"hex
Reset value: xxxxb
Reset value: xxxxb
T
he SRB is the receive buffer of the SSI. The shift register clocks serial data in (most significant
bit first) and loads content into the receive buffer when complete telegram has been received.
77
4590B鈥?BMCU鈥?2/03

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