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T48C862-R8 Datasheet

  • T48C862-R8

  • MCU

  • Atmel   Atmel

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T48C862-R8
Figure 71.
SSI Output Masking Function
CL2/1
SCL
Compare 2/1
CM1
OMSK
Control
SC
SSI-control
Output
TOG2
POUT
T1OUT
SYSCL
SO
/2
Shift_CL
MSB
8-bit shift register
SI
LSB
SO
4-bit counter 2/1
Timer 2
Serial Interface Registers
Serial Interface Control
Register 1 (SIC1)
Bit 3
SIR
Bit 2
SCD
Bit 1
SCS1
Bit 0
SCS0
Reset value: 1111b
Auxiliary register address: "9"hex
SIR
Serial Interface Reset
SIR = 1, SSI inactive
SIR = 0, SSI active
Serial Clock Direction
SCD = 1, SC line used as output
SCD = 0, SC line used as input
Note:
This bit has to be set to "1" during the MCL mode and the Timer 3 mode 10 or 11
SCD
SCS1
SCS0
Serial Clock
source
Select
bit
1
Serial Clock
source
Select
bit
0
SCS1
1
1
SCS0
1
0
1
0
Internal Clock for SSI
SYSCL/2
T1OUT/2
POUT/2
TOG2/2
Note:
with SCD = 0 the bits SCS1
and SCS0 are insignificant
0
0
鈥?/div>
鈥?/div>
鈥?/div>
In Transmit mode (SDD = 1) shifting starts only if the transmit buffer has been
loaded (SRDY = 1).
Setting SIR-bit loads the contents of the shift register into the receive buffer
(synchronous 8-bit mode only).
In MCL modes, writing a 0 to SIR generates a start condition and writing a 1
generates a stop condition.
75
4590B鈥?BMCU鈥?2/03

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