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T48C862-R8 Datasheet

  • T48C862-R8

  • MCU

  • Atmel   Atmel

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Timer 1 Control Register 1
(T1C1)
Bit 3 *
T1RM
Bit 2
T1C2
Bit 1
T1C1
Bit 0
T1C0
Address: "7"hex - Subaddress: "8"hex
Reset value: 1111b
* Bit 3 -> MSB, Bit 0 -> LSB
T1RM
Timer 1 Restart Mode
T1RM = 0, write access without Timer 1 restart
T1RM = 1, write access with Timer 1 restart
Note:
If WDL = 0, Timer 1 restart is impossible
Timer 1 Control
bit
2
Timer 1 Control
bit
1
Timer 1 Control
bit
0
T1C2
T1C1
T1C0
The three bits T1C[2:0] select the divider for timer 1. The resulting time interval depends
on this divider and the timer 1 input clock source. The timer input can be supplied by the
system clock, the 32-kHz oscillator or via the clock management. If the clock manage-
ment generates the SUBCL, the selected input clock from the RC oscillator, 4-MHz
oscillator or an external clock is divided by 16.
Time Interval with
SUBCL
SUBCL/2
SUBCL/4
SUBCL/8
SUBCL/16
SUBCL/32
SUBCL/256
SUBCL/2048
SUBCL/16384
T1C2
0
0
0
0
1
1
1
1
T1C1
0
0
1
1
0
0
1
1
T1C0
0
1
0
1
0
1
0
1
Divider
2
4
8
16
32
256
2048
16384
Time Interval with
SUBCL = 32 kHz
61 碌s
122 碌s
244 碌s
488 碌s
0.977 ms
7.812 ms
62.5 ms
500 ms
Time Interval with
SYSCL = 2/1 MHz
1 碌s/2 碌s
2 碌s/4 碌s
4 碌s/8 碌s
8 碌s/16 碌s
16 碌s/32 碌s
128 碌s/256 碌s
1024 碌s/2048 碌s
8192 碌s/16384 碌s
42
T48C862-R8
4590B鈥?BMCU鈥?2/03

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