= 100k鈩?/div>
Sample Size = 203
Temperature Range = -40擄C to +85
擄C
40
30
20
10
0.50
0.75
1.00
1.25
1.50
1.75
-1.75
-1.50
-1.25
-1.00
-0.75
-0.50
-2.00
-0.25
2.00
0
0
1
2
3
4
5
6
7
8
Change in Offset Voltage with Temperature (碌V/擄C)
Offset Voltage (mV)
FIGURE 2-8:
Offset Voltage
Occurrences with V
DD
= 2.7V.
vs.
Number
of
FIGURE 2-11:
Offset Voltage Drift vs. Number of
Occurrences with V
DD
= 2.7V
400
300
Offset Voltage (碌V)
200
100
0
-100
-200
-300
-400
-500
-40
-20
0
20
40
V
DD
= 5.5V
V
DD
= 2.7V
R
L
= 100k鈩?/div>
Common Mode Rejection Ratio, Power Supply Rejection
Ratio (dB)
500
100
CMRR
V
DD
= 2.7V
V
CM
= -0.3V to 1.5V
PSRR,
V
DD
= 2.7V to 5.5V
90
CMRR
V
DD
= 5.5V
V
CM
= -0.3V to 4.3V
95
85
80
60
80
75
-40
-20
0
20
Temperature (擄 C)
40
60
80
Temperature (擄C)
FIGURE 2-9:
Normalized Offset Voltage vs. Temper-
ature with V
DD
= 2.7V
FIGURE 2-12:
Common-Mode Rejection Ratio,
Power Supply Rejection Ratio vs. Temperature
錚?/div>
2000 Microchip Technology Inc.
DS21314D-page 5
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