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AT89c52 Datasheet

  • AT89c52

  • 8 Bit MicroController with 8K Flash 

  • Atmel   Atmel

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Program Memory Lock Bits
The AT89C52 has three lock bits that can be left unpro-
grammed (U) or can be programmed (P) to obtain the addi-
tional features listed in the following table.
V
PP
= 12V
Top-Side Mark
AT89C52
xxxx
yyww
(030H)=1EH
(031H)=52H
(032H)=FFH
V
PP
= 5V
AT89C52
xxxx-5
yyww
(030H)=1EH
(031H)=52H
(032H)=05H
Lock Bit Protection Modes
Program Lock Bits
LB1
1
2
U
P
LB2
U
U
LB3
U
U
Protection Type
No program lock features.
MOVC instructions executed
from external program
memory are disabled from
fetching code bytes from
internal memory, EA is
sampled and latched on reset,
and further programming of
the Flash memory is disabled.
Same as mode 2, but verify is
also disabled.
Same as mode 3, but external
execution is also disabled.
Signature
3
4
P
P
P
P
U
P
When lock bit 1 is programmed, the logic level at the EA pin
is sampled and latched during reset. If the device is pow-
ered up without a reset, the latch initializes to a random
value and holds that value until reset is activated. The
latched value of EA must agree with the current logic level
at that pin in order for the device to function properly.
Programming the Flash
The AT89C52 is normally shipped with the on-chip Flash
memory array in the erased state (that is, contents = FFH)
and ready to be programmed. The programming interface
accepts either a high-voltage (12-volt) or a low-voltage
(V
CC
) program enable signal. The low voltage program-
ming mode provides a convenient way to program the
AT89C52 inside the user鈥檚 system, while the high-voltage
programming mode is compatible with conventional third-
party Flash or EPROM programmers.
The AT89C52 is shipped with either the high-voltage or
low-voltage programming mode enabled. The respective
top-side marking and device signature codes are listed in
the following table.
The AT89C52 code memory array is programmed byte-by-
byte in either programming mode.
To program any non-
blank byte in the on-chip Flash Memory, the entire memory
must be erased using the Chip Erase Mode.
Programming Algorithm:
Before programming the
AT89C52, the address, data and control signals should be
set up according to the Flash programming mode table and
Figures 9 and 10. To program the AT89C52, take the fol-
lowing steps.
1. Input the desired memory location on the address
lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/V
PP
to 12V for the high-voltage programming
mode.
5. Pulse ALE/PROG once to program a byte in the Flash
array or the lock bits. The byte-write cycle is self-timed
and typically takes no more than 1.5 ms. Repeat steps
1 through 5, changing the address and data for the
entire array or until the end of the object file is reached.
Data Polling:
The AT89C52 features Data Polling to indi-
cate the end of a write cycle. During a write cycle, an
attempted read of the last byte written will result in the com-
plement of the written data on PO.7. Once the write cycle
has been completed, true data is valid on all outputs, and
the next cycle may begin. Data Polling may begin any time
after a write cycle has been initiated.
Ready/Busy:
The progress of byte programming can also
be monitored by the RDY/BSY output signal. P3.4 is pulled
low after ALE goes high during programming to indicate
BUSY. P3.4 is pulled high again when programming is
done to indicate READY.
Program Verify:
If lock bits LB1 and LB2 have not been
programmed, the programmed code data can be read back
via the address and data lines for verification. The lock bits
cannot be verified directly. Verification of the lock bits is
achieved by observing that their features are enabled.
4-72
AT89C52

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