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MSM7540 Datasheet

  • MSM7540

  • Single Rail ADPCM CODEC

  • OKI

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FEDL7540-03
隆 Semiconductor
MSM7540/7560
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
V
DD
V
AIN
V
DIN
T
STG
Condition
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Rating
鈥?.3 to +7
鈥?.3 to V
DD
+ 0.3
鈥?.3 to V
DD
+ 0.3
鈥?5 to +150
Unit
V
V
V
擄C
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature
Input High Voltage
Symbol
V
DD
Ta
V
IH
Condition
Voltage must be fixed
鈥?/div>
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK, XSYNC, RSYNC, PCMRI,
Input Low Voltage
Master Clock Frequency
Bit Clock Freqency
Synchronous Signal Frequency
Clock Duty Ratio
Digital Input Rise Time
V
IL
f
MCK
f
BCKA
f
BCKB
f
SYMC
D
C
t
Ir
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK
BCLKA
BCLKB
XSYNC, RSYNC
MCK, BCLKA, BCLKB
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK, XSYNC, RSYNC, PCMRI,
Digital Input Fall Time
t
If
t
XS
t
XS
t
RS
t
SR
t
WS
t
DS
t
DH
R
DL
C
DL
C
SG
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
Transmit Sync Signal Setting Time
Receive Sync Signal Setting Time
Synchronous Signal Width
PCM, ADPCM Set-up Time
PCM, ADPCM Hold Time
Digital Output Load
Bypass Capacitor for SG
BCLKA, BCLKB to XSYNC
XSYNC to BCLKA, BCLKB
BCLKA, BCLKB to RSYNC
RSYNC to BCLKA, BCLKB
XSYNC, RSYNC
鈥?/div>
鈥?/div>
IS (Pull-up Resistor)
IS, PCMSO, PCMRO
SG麓GND
100
100
100
100
1 BCLK
100
100
500
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
10 + 0.1
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
100
鈥?/div>
鈥?/div>
鈥?/div>
100
鈥?/div>
ns
ns
ns
ns
ms
ns
ns
W
pF
mF
鈥?/div>
鈥?/div>
50
ns
鈥?/div>
鈥?/div>
50
ns
鈥?.01%
32
64
鈥?/div>
30
10.368
鈥?/div>
鈥?/div>
8.0
50
+0.01%
2048
2048
鈥?/div>
70
MHz
kHz
kHz
kHz
%
0
鈥?/div>
0.6
V
2.2
鈥?/div>
V
DD
V
Min.
4.5
鈥?5
Typ.
鈥?/div>
+25
Max.
5.5
+70
Unit
V
擄C
8/16

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