DS1746/DS1746P
AC TEST CONDITIONS
Output Load:
100 pF + 1TTL Gate
Input Pulse Levels:
0.0 to 3.0V
Timing Measurement Reference Levels:
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5 ns
NOTES:
1. Voltages are referenced to ground.
2. Typical values are at 25
擄
C and nominal supplies.
3. Outputs are open.
4. Battery switch over occurs at the lower of either the battery terminal voltage or V
PF
.
5. Data retention time is at 25
擄
C.
6. Each DS1746 has a built鈥搃n switch that disconnects the lithium source until V
CC
is first applied by the
user. The expected t
DR
is defined for DIP modules and assembled PowerCap modules as a cumulative
time in the absence of V
CC
starting from the time power is first applied by the user.
7. Real鈥揟ime Clock Modules (DIP) can be successfully processed through conventional wave鈥搒oldering
techniques as long as temperatures as long as temperature exposure to the lithium energy source
contained within does not exceed +85
擄
C. Post solder cleaning with water washing techniques is
acceptable, provided that ultra-sonic vibration is not used.
In addition, for the PowerCap:
a. Dallas Semiconductor recommends that PowerCap Module bases experience one pass through
solder reflow oriented with the label side up (鈥渓ive 鈥?bug鈥?.
b. Hand Soldering and touch鈥搖p: Do not touch or apply the soldering iron to leads for more than
3 (three) seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To
remove the part, apply flux, heat the lead frame pad until the solder reflows and use a solder wick
to remove solder.
8. t
AH1
, t
DH1
are measured from WE going high.
9. t
AH2
, t
DH2
are measured from CE going high.
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