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SLE4432 Datasheet

  • SLE4432

  • Intelligent 256Bit EEPROM

  • Infineon   Infineon

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SLE 4432
SLE 4442
SLE 4442
Additionally to the above functions the SLE 4442 provides a security code logic which controls the
write/erase access to the memory. For this purpose the SLE 4442 contains a 4-byte security
memory with an
Error Counter
EC (bit 0 to bit 2) and 3 bytes reference data. These 3 bytes as a
whole are called
Programmable Security Code
(PSC). After power on the whole memory, except for
the reference data, can only be read. Only after a successful comparison of verification data with the
internal reference data the memory has the identical access functionality of the SLE 4432 until the
power is switched off. After three successive unsuccessful comparisons the
Error Counter
blocks
any subsequent attempt, and hence any possibility to write and erase.
2.2
Transmission Protocol
The transmission protocol is a two wire link protocol between the interface device IFD and the
integrated circuit IC. It is identical to the protocol type 鈥淪 = A鈥? All data changes on I/O are initiated
by the falling edge on CLK.
The transmission protocol consists of the 4 modes:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Reset and Answer-to-Reset
Command Mode
Outgoing Data Mode
Processing Mode
Operational modes
Note:
The I/O pin is open drain and therefore requires an external pull up resistor to achieve a high
level.
Semiconductor Group
9

SLE4432 PDF文件相關型號

SLE4442,SLE4442C,SLE4442M2.2

SLE4432相關型號PDF文件下載

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