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K4E160811D Datasheet

  • K4E160811D

  • 2M x 8Bit CMOS Dynamic RAM with Extended Data Out

  • 21頁

  • SAMSUNG   SAMSUNG

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K4E170811D, K4E160811D
K4E170812D, K4E160812D
CMOS DRAM
2M x 8Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 2,097,152 x 8 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K
Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of
this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh
operation is available in L-version. This 2Mx8 EDO Mode DRAM family is fabricated using Samsung鈥瞫 advanced CMOS process to real-
ize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer and personal
computer.
FEATURES
鈥?/div>
Part Identification
- K4E170811D-B(F) (5V, 4K Ref.)
- K4E160811D-B(F) (5V, 2K Ref.)
- K4E170812D-B(F) (3.3V, 4K Ref.)
- K4E160812D-B(F) (3.3V, 2K Ref.)
鈥?/div>
Active Power Dissipation
Unit : mW
Speed
4K
-50
-60
324
288
3.3V
2K
396
360
4K
495
440
5V
2K
605
550
鈥?Extended Data Out Mode operation
(Fast page mode with Extended Data Out)
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Self-refresh capability (L-ver only)
鈥?Fast parallel test mode capability
鈥?TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?JEDEC Standard pinout
鈥?Available in Plastic SOJ and TSOP(II) packages
鈥?Single +5V鹵10% power supply (5V product)
鈥?Single +3.3V鹵0.3V power supply (3.3V product)
鈥?/div>
Refresh Cycles
Part
NO.
K4E170811D
K4E170812D
K4E160811D
K4E160812D
V
CC
5V
3.3V
5V
3.3V
2K
32ms
Refresh
cycle
4K
Refresh period
Normal
64ms
128ms
L-ver
RAS
CAS
W
FUNCTIONAL BLOCK DIAGRAM
Control
Clocks
Vcc
Vss
VBB Generator
Data in
Refresh Timer
Refresh Control
Refresh Counter
Memory Array
2,097,152 x8
Cells
Row Decoder
Sense Amps & I/O
Buffer
DQ0
to
DQ7
鈥?/div>
Performance Range
Speed
-50
-60
t
RAC
50ns
60ns
t
CAC
13ns
15ns
t
RC
84ns
104ns
t
HPC
20ns
25ns
Remark
5V/3.3V
5V/3.3V
A0-A11
(A0 - A10)
*1
A0 - A8
(A0 - A9)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Data out
Buffer
OE
Note)
*1
: 2K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

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